Novel Protruded-Shape Unipolar Resistive Random Access Memory Structure for Improving Switching Uniformity through Excellent Conductive Filament Controllability

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概要

• 論文の詳細を見る

• Resistive random access memory (RRAM) with a new structure which can effectively control switching area and electric field is proposed. It has been verified that the decrease in area of resistive material with the new structure increases electric field of switching area, and that such increased electric field makes initial forming at unipolar switching rather easier, resulting in effective decrease in forming voltage. Also, as the area in switching area is effectively reduced, decrease in reset current and set voltage in a limited area has also been verified. Excellent resistive switching characteristics are possible by decrease of conductive filament (CF) area in our structure. Random circuit breaker (RCB) simulation model which can effectively explain percolation switching similar to unipolar switching verifies such structural effect.

• 2012-06-25

著者

• PARK Byung-Gook

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Compu

• Ryoo Kyung-chang

  Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering And Computer Science Seoul National University

• Oh Jeong-hoon

  Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering And Computer Science Seoul National University

• Jung Sunghun

  Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering And Computer Science Seoul National University

• Ryoo Kyung-Chang

  Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Science, Seoul National University, Seoul 151-742, Republic of Korea

• Park Byung-Gook

  Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Science, Seoul National University, Seoul 151-742, Republic of Korea

• Kim Sungjun

  Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Science, Seoul National University, Seoul 151-742, Republic of Korea

• Jeong Hongsik

  DRAM Process Architecture Team, Memory Division, Semiconductor Business, Samsung Electronics Co., Ltd., Yongin, Gyeonggi 445-701, Republic of Korea

• Park Byung-Gook

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical and Computer Science, Seoul National University, San 56-1, Sillim-dong, Gwanak-ku, Seoul 151-742, Republic of Korea

• Oh Jeong-Hoon

  Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Science, Seoul National University, Seoul 151-742, Republic of Korea

• Park Byung-Gook

  Inter-University Semiconductor Research Center (ISRC) and Department of Electrical Engineering and Computer Science, Seoul National University, Seoul 151-742, Republic of Korea

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