Capacitorless Dynamic Random Access Memory Cell with Highly Scalable Surrounding Gate Structure

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概要

• 論文の詳細を見る

• We propose the surrounding gate metal oxide semiconductor field effect transistor (MOSFET) with vertical channel [surrounding gate and vertical channel (SGVC) cell] as a one transistor (1T) dynamic random access memory (DRAM) cell. To confirm the memory operation of the SGVC cell, we fabricated a highly scalable SGVC cell. Because of its vertical channel structure and common source architecture, it can readily be made into a 4F2 cell array. The sensing margin was around 6 μA which is sufficiently large for read operation. Read retention time was about 4 ms meaning that the read operation is non-destructive. Also, we have revealed that not only an increase in the volume of the floating body region but also an adequate amount of charge is required for an increase in the sensing margin.

• Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
• 2007-04-30

著者

• PARK Byung-Gook

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Compu

• Choi Woo

  Inter-university Semiconductor Research Center Seoul National University

• JEONG Hoon

  Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National

• Park Il

  Inter-university Semiconductor Research Center And School Of Electrical Engineering And Computer Sci

• Lee Yeun

  Inter-university Semiconductor Research Center And School Of Electrical Engineering Seoul National U

• Lee Jong

  Inter-univ. Semicon. Res. Center Seoul Nat. Univ.

• Kang Sangwoo

  Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering And Compu

• Shin Hyungcheol

  Inter-university Semiconductor Research Center (isrc)

• Shin Hyungcheol

  Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University, ENG 420-016, Sillim-dong, Gwank-gu, Seoul 151-722, Korea

• Park Byung-Gook

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical and Computer Science, Seoul National University, San 56-1, Sillim-dong, Gwanak-ku, Seoul 151-742, Republic of Korea

• Park Byung-Gook

  Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University, ENG 420-016, Sillim-dong, Gwank-gu, Seoul 151-722, Korea

• Choi Woo

  Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University, ENG 420-016, Sillim-dong, Gwank-gu, Seoul 151-722, Korea

• Park Il

  Inter-University Semiconductor Research Center (ISRC) and School of Electrical and Computer Science, Seoul National University, San 56-1, Sillim-dong, Gwanak-ku, Seoul 151-742, Republic of Korea

• Park Il

  Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University, ENG 420-016, Sillim-dong, Gwank-gu, Seoul 151-722, Korea

• Lee Jong

  Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University, ENG 420-016, Sillim-dong, Gwank-gu, Seoul 151-722, Korea

• Park Byung-Gook

  Inter-University Semiconductor Research Center (ISRC) and Department of Electrical Engineering and Computer Science, Seoul National University, Seoul 151-742, Republic of Korea

• Kang Sangwoo

  Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University, ENG 420-016, Sillim-dong, Gwank-gu, Seoul 151-722, Korea

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