Kang Sangwoo | Inter-university Semiconductor Research Center (isrc) And School Of Electrical Engineering And Compu

スポンサーリンク

概要

関連著者

もっと見る

著作論文

Recessed Channel Dual Gate Single Electron Transistors (RCDG-SETs) for room temperature operation(Session3: Emerging Devices I)
Recessed Channel Dual Gate Single Electron Transistors (RCDG-SETs) for room temperature operation(Session3: Emerging Devices I)
Self-Aligned Dual-Gate Single-Electron Transistors (DG-SETs)
Capacitorless DRAM Cell with Highly Scalable Surrounding Gate Structure
Analyses on Current Characteristics of 3-D MOSFET Nonvolatile Memory Devices Determined by Junction Doping Profiles(Session 7A Silicon Devices IV,AWAD2006)
Analyses on Current Characteristics of 3-D MOSFET Nonvolatile Memory Devices Determined by Junction Doping Profiles(Session 7A Silicon Devices IV,AWAD2006)
Analyses on Current Characteristics of 3-D MOSFET Nonvolatile Memory Devices Determined by Junction Doping Profiles
Recessed Channel Dual Gate Single Electron Transistors (RCDG-SETs) for Room Temperature Operation
Design and Simulation of Asymmetric MOSFETs(Session 7A Silicon Devices IV,AWAD2006)
Design and Simulation of Asymmetric MOSFETs(Session 7A Silicon Devices IV,AWAD2006)
Design and Simulation of Asymmetric MOSFETs
Design and simulation of single hole transistor with tunneling barrier formed by fixed charge (Electron devices: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))
Design and simulation of single hole transistor with tunneling barrier formed by fixed charge (Silicon devices and materials: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))
Self-Aligned Dual-Gate Single-Electron Transistors
Capacitorless Dynamic Random Access Memory Cell with Highly Scalable Surrounding Gate Structure

もっと見る

スポンサーリンク