20703 Cu/porous low-k構造におけるCMP中の応力解析(機械工学が支援する半導体製造技術(I),OS13 機械工学が支援する半導体薄膜製造技術)

概要

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Porous low-k materials are required in the construction of 45nm-node LSI devices. However, the extremely low Young's modulus values of these materials result in SCC (Stress Corrosion Cracking) of Cu interconnects during CMP processing. We performed FEM (Finite Element Method) analysis of stress during each steps in CMP processing. The results supported that the horizontal tensile stress concentrated especially at the edges of the isolated fine wiring, and that higher tensile stresses appeared at the step of Cu clear CMP. Moreover, the maximum values of tensile stress increased with the decrease of Young's modulus of low-k films. Since the cause of horizontal tensile stress is due to the downward CMP pressure on the hard surface (Cu) and the soft surface (low-k film), which indented the low-k films, CMP process with a lighter downward pressure and a structure with dummy pattern is recommended.
社団法人日本機械学会の論文
2005-03-17