First Fabrication of GaInAs/InP Buried Metal Heterojunction Bipolar Transistor and Reduction of Base-Collector Capacitance
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概要
- 論文の詳細を見る
- 社団法人応用物理学会の論文
- 2000-06-01
著者
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MIYAMOTO Yasuyuki
Department of Physical Electronics, Tokyo Institute of Technology
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FURUYA Kazuhito
Department of Physical Electronics, Tokyo Institute of Technology
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YAMAGAMI Shigeharu
Department of Electrical and Electronic Engineering, Tokyo Institute of Technology
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Arai T
Department Of Physical Electronics Tokyo Institute Of Technology
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Miyamoto Y
Department Of Physical Electronics Tokyo Institute Of Technology
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ARAI Toshiki
Department of Physical Electronics, Tokyo Institute of Technology
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HARADA Yoshimichi
the Department of Physical Electronics, Tokyo Institute of Technology
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HARADA Yoshimichi
Department of Electrical and Electronic Engineering, Tokyo Institute of Technology
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Furuya Kazuhito
Department Of Electrical And Electronic Engineering
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YAMAGAMI Shigeharu
Silicon Systems Research Labs.
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Miyamoto Yasuyuki
Department Of Electrical And Electronic Engineering Tokyo Institute Of Technology
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Furuya K
Department Of Physical Electronics Tokyo Institute Of Technology
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Harada Y
Univ. Hyogo Himeji‐shi Jpn
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Miyamoto Yasuyuki
Department Of Electrical And Electronic Engineering
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