YAMAGAMI Shigeharu | Silicon Systems Research Labs.
スポンサーリンク
概要
関連著者
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YAMAGAMI Shigeharu
Silicon Systems Research Labs.
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YAMAGAMI Shigeharu
Department of Electrical and Electronic Engineering, Tokyo Institute of Technology
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MIYAMOTO Yasuyuki
Department of Physical Electronics, Tokyo Institute of Technology
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FURUYA Kazuhito
Department of Physical Electronics, Tokyo Institute of Technology
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Arai T
Department Of Physical Electronics Tokyo Institute Of Technology
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Miyamoto Y
Department Of Physical Electronics Tokyo Institute Of Technology
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Furuya K
Department Of Physical Electronics Tokyo Institute Of Technology
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黄 俐昭
Necシリコンシステム研究所
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Asada Masahiro
Department of Neurosurgery, Chibune Hospital
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Itoh Atsushi
Department of Arrhythmia and Electrophysiology, Shizuoka Saiseikai General Hospital
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Lee Jong-wook
Silicon Systems Research Labs.
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Lee J‐w
Technology Development Semiconductor R&d Center Samsung Electronics Co.
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Itoh Atsushi
Department Of Electrical And Electronic Engineering Tokyo Institute Of Technology
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Asada Masahiro
Department Of Electrical And Electronic Engineering Tokyo Institute Of Technology
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Saito W
Tokyo Inst. Technol. Tokyo Jpn
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Saito Wataru
Institute Of Agriculture And Forestry University Of Tsukuba
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SAITOH Wataru
Department of Electrical and Electronic Engineering, Tokyo Institute of Technology
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黄 俐昭
Necマイクロエレクトロニクス研究所
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Itoh A
Ricoh Co. Ltd. Miyagi Jpn
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MOGAMI Tohru
Silicon Systems Research Laboratories, NEC Corporation
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Mogami T
Silicon Systems Research Laboratories Nec Corporation
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Mogami T
Nec Corp. Sagamihara‐shi Jpn
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Mogami Tohru
Silicon Systems Research Laboratories Nec Corporation
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Saitoh Wataru
Department Of Electrical And Electronic Engineering Tokyo Institute Of Technology
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WAKABAYASHI Hitoshi
Silicon Systems Research Laboratories, NEC Corporation
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Saito W
Toshiba Corp. Kawasaki Jpn
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ARAI Toshiki
Department of Physical Electronics, Tokyo Institute of Technology
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HARADA Yoshimichi
the Department of Physical Electronics, Tokyo Institute of Technology
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Furuya Kazuhito
Department Of Electrical And Electronic Engineering
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Itoh A
Tokyo Inst. Technol. Tokyo Jpn
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SAITOH Yukisige
R&D Technical Support Center, NEC Co.
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KOH Risho
Silicon Systems Research Labs.
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Wakabayashi Hitoshi
Silicon Systems Research Laboratories Nec Corporation
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Miyamoto Yasuyuki
Department Of Electrical And Electronic Engineering Tokyo Institute Of Technology
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Koh R
Silicon Systems Research Labs.
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Koh Risho
Silicon Systems Research Laboratories Nec Corporation
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Koh Risho
Microelectronics Reserch Laboratory Nec Corp.
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Koh Risho
Microelectronics Research Laboratories Nec Corporation
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Koh Risho
Microelectronics Research Labs. Nec Corp.
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Koh Risho
Silicon Systems Research Laboratory Nec Corporation
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Koh Risho
Microelectronics Res. Labs. Nec Corp.
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Harada Y
Univ. Hyogo Himeji‐shi Jpn
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Wakabayashi Hitoshi
Silicon Systems Research Labs.
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Saitoh Yukisige
R&d Technical Support Center Nec Co.
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Itoh Atsushi
Department Of Applied Chemistry Tokai University
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Miyamoto Yasuyuki
Department Of Electrical And Electronic Engineering
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ARAI Toshiki
the Department of Physical Electronics, Tokyo Institute of Technology
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YAMAGAMI Shigeharu
the Department of Physical Electronics, Tokyo Institute of Technology
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OKUDA Yoshifumi
the Department of Physical Electronics, Tokyo Institute of Technology
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MIYAMOTO Yasuyuki
the Department of Physical Electronics, Tokyo Institute of Technology
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FURUYA Kazuhito
the Department of Physical Electronics, Tokyo Institute of Technology
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HARADA Yoshimichi
Department of Electrical and Electronic Engineering, Tokyo Institute of Technology
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Okuda Yoshifumi
The Department Of Physical Electronics Tokyo Institute Of Technology
著作論文
- Analysis of Short-Channel Schottky Source/Drain Metal-Oxide-Semiconductor Field-Effect Transistor on Silicon-on-Insulator Substrate and Demonstration of Sub-50-nm n-type Devices with Metal Gate
- 35 nm Metal Gate p-type Metal Oxide Semiconductor Field-Effect Transistor with PtSi Schottky Source/Drain on Separation by Implanted Oxygen Substrate
- InP DHBT with 0.5μm Wide Emitter alongDirection toward BM-HBT with Narrow Emitter(Joint Special Issue on Heterostructure Microelectronics with TWHM 2000)
- Reduction of Base-Collector Capacitance inSubmicron InP/GalnAs Heterojunction Bipolar Transistors with Buried Tungsten Wires : Semiconductors
- First Fabrication of GaInAs/InP Buried Metal Heterojunction Bipolar Transistor and Reduction of Base-Collector Capacitance
- ELFIN (ELevated Field INsulator) and SEP (S/D Elevated by Poly-Si Plugging) Process for Ultra-Thin SOI MOSFETs
- ELFIN (ELevated Field INsulator) and SEP (S/D Elevated by Poly-Si Plugging) Process for Ultra-Thin SOI MOSFETs