100 nm-MOSFET Model for Circuit Simulation : Challenges and Solutions(<Special Issue>Devices and Circuits for Next Generation Multi-Media Communication Systems)

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概要

• 論文の詳細を見る

• The key elements of sub-100 nm MOSFET modeling for circuit simulation are accurate representation of new physical phenomena arising from advancing technologies and numerical efficacy. We summarize the history of MOSFET modeling, and address difficulties faced by conventional methods. The advantage of the surface-potential-based approach will be emphasized. Perspectives for next generations will be also discussed.

• 社団法人電子情報通信学会の論文
• 2003-06-01

著者

• Mattausch Hans

  Hiroshima Univ. Higashihiroshima‐shi Jpn

• Mattausch H

  Hiroshima Univ. Higashi‐hiroshima‐shi Jpn

• Mattausch Hans

  Research Center For Nanodevices And Systems Hiroshima University

• Ueno Hiroki

  Department Of Electrical And Electronic Engineering Chuo University

• Mattausch Hans

  Hiroshima University

• Morikawa Keiichi

  Semiconductor Technology Academic Research Center

• Kobayashi Akiyoshi

  Semiconductor Technology Academic Research Center

• Mattausch Hans

  Research Institute For Nanodevice And Bio Systems Hiroshima University

• Masuda Hiroo

  Semiconductor Technology Academic Research Center (starc)

• Masuda Hiroo

  Semiconductor Technology Academic Research Center

• Ueno H

  Graduate School Of Advanced Sciences Of Matter Hiroshima University:(present Address)matsushita Semi

• Ueno Hiroaki

  Graduate School Of Advanced Sciences Of Matter Hiroshima University

• MIURA-MATTAUSCH Mitiko

  Graduate School of Advanced Science of Matter, Hiroshima University

• Miura‐mattausch M

  Hiroshima Univ. Higashi‐hiroshima Jpn

• ITOH Satoshi

  Semiconductor Technology Academic Research Center

• Itoh Satoshi

  Semiconductor Device Engineering Laboratory Toshiba Corporation

• Miura-mattausch Mitiko

  Hiroshima-university

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