Compact Modeling of Expansion Effects in LDMOS
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概要
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In LDMOS devices for high-voltage applications, there appears a notable fingerprint of current-voltage characteristics known as soft breakdown. Its mechanism is analyzed and modeled on LDMOS devices where a high resistive drift region exists. This analysis has revealed that the softness of breakdown, known as the expansion effect, withholding a run-away of current, is contributed by the flux of holes underneath the gate-overlap region originated by impact-ionization. The mechanism of the expansion effect is modeled and implemented into the compact model HiSIM_HV for circuit simulation. A good agreement between simulated characteristics and 2D-device simulation results is verified.
著者
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Feldmann Uwe
Hiroshima Univ. Higashihiroshima‐shi Jpn
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Mattausch Hans
Hiroshima Univ. Higashihiroshima‐shi Jpn
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MIURA-MATTAUSCH Mitiko
Hiroshima University
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MIYAKE Masataka
Hiroshima University
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Tanaka Akihiro
Hiroshima University, Higashihiroshima, Hiroshima 739-8530, Japan
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Kikuchihara Hideyuki
Hiroshima University, Higashihiroshima, Hiroshima 739-8530, Japan
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IIZUKA Takahiro
Hiroshima University
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SAKUDA Takashi
Hiroshima University
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ORITSUKI Yasunori
Hiroshima University
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