Measurement of Inner-chip Variation and Signal Integrity By a 90-nm Large-scale TEG

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概要

• 論文の詳細を見る

• We have developed the world first measurement methodology of both inner chip variation and SI(signal integrity) in a same 90nm large scale TEG(Test Element Group).

• 社団法人電子情報通信学会の論文
• 2005-09-02

著者

• Yamamoto Masaharu

  Semiconductor Technology Academic Research Center (starc)

• Masuda Hiroo

  Semiconductor Technology Academic Research Center (starc)

• Masuda Hiroo

  Semiconductor Technology Academic Research Center

• Hayasi Yayoi

  Hitachi ULSI Systems Co., Ltd.

• Endo Hitoshi

  Hitachi ULSI Systems Co., Ltd.

• Hayasi Yayoi

  Hitachi Ulsi Systems Co. Ltd.

• Endo Hitoshi

  Hitachi Ulsi Systems Co. Ltd.

関連論文

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• Approximation Formula Approach for the Efficient Extraction of On-Chip Mutual Inductances
• Fast On-Chip Inductance Extraction of VLSI Including Angled Interconnects
• A Practical Approach for Efficiently Extracting Interconnect Capacitances with Floating Dummy Fills(VLSI Design Technology and CAD)
• Measurement of Inner-chip Variation and Signal Integrity By a 90-nm Large-scale TEG
• Measurement of Inner-chip Variation and Signal Integrity By a 90-nm Large-scale TEG
• 100 nm-MOSFET Model for Circuit Simulation : Challenges and Solutions

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