100 nm-MOSFET Model for Circuit Simulation : Challenges and Solutions
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概要
- 論文の詳細を見る
- 2003-06-01
著者
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Mattausch Hans
Research Center For Nanodevices And Systems Hiroshima University
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Morikawa Keiichi
Semiconductor Technology Academic Research Center
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Kobayashi Akiyoshi
Semiconductor Technology Academic Research Center
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Masuda Hiroo
Semiconductor Technology Academic Research Center (starc)
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Masuda Hiroo
Semiconductor Technology Academic Research Center
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Ueno Hiroaki
Graduate School Of Advanced Sciences Of Matter Hiroshima University
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MIURA-MATTAUSCH Mitiko
Graduate School of Advanced Science of Matter, Hiroshima University
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ITOH Satoshi
Semiconductor Technology Academic Research Center
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Itoh Satoshi
Semiconductor Device Engineering Laboratory Toshiba Corporation
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UENO Hiroaki
Graduate School of Advanced Sciences of Matter, Hiroshima University
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MATTAUSCH Hans
Research Center for Nanodevices and Systems, Hiroshima University
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