Real-Time Huffman Encoder with Pipelined CAM-Based Data Path and Code-Word-Table Optimizer(Image Processing and Video Processing)
スポンサーリンク
概要
- 論文の詳細を見る
This paper presents a novel optimized real-time Huffman encoder using a pipelined data path based on CAM technology and a parallel code-word-table optimizer. The exploitation of CAM technology enables fast parallel search of the code word table. At the same time, the code word table is optimized according to the frequency of received input symbols and is up-dated in real-time. Since these two functions work in parallel, the proposed architecture realizes fast parallel encoding and keeps a constantly high compression ratio. Evaluation results for the JPEG application show that the proposed architecture can achieve up to 28% smaller encoded picture sizes than the conventional architectures. The obtained encoding time can be reduced by 95% in comparison to a conventional SRAM-based architecture, which is suitable even for the latest end-user-devices requiring fast frame-rates. Furthermore, the proposed architecture provides the only encoder that can simultaneously realize small compressed data size and fast processing speed.
- 社団法人電子情報通信学会の論文
- 2007-01-01
著者
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Noda H
System Core Technology Div. System Solution Business Group Renesas Technology Co.
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Dosaka K
System Core Technology Div. System Solution Business Group Renesas Technology Co.
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Mattausch Hans
Hiroshima Univ. Higashihiroshima‐shi Jpn
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Mattausch Hans
Research Center For Nanodevices And Systems Hiroshima University
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Mattausch Hans
Hiroshima University
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Saito Kazunori
System Core Technology Div. System Solution Business Group Renesas Technology Co.
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Dosaka Katsumi
System Core Technology Div. Renesas Technology Corp.
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Mattausch Hans
Research Institute For Nanodevice And Bio Systems Hiroshima University
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KOIDE Tetsushi
Research Center for Nanodevices and Systems, Hiroshima University
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Noda Hideyuki
System Core Technology Div. System Solution Business Group Renesas Technology Co.
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Koide Tetsushi
Research Institute For Nanodevice And Bio Systems Hiroshima University
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Koide Tetsushi
Hiroshima Univ. Higashihiroshima‐shi Jpn
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Koide Tetsushi
Research Center For Nanodevices And Systems Hiroshima University
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KUMAKI Takeshi
Research Institute for Nanodevice and Bio Systems, Hiroshima University
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ISHIZAKI Masakatsu
Research Institute for Nanodevice and Bio Systems, Hiroshima University
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ARIMOTO Kazutami
System Core Technology Div. System Solution Business Group, Renesas Technology Co.
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KURODA Yasuto
Research Center for Nanodevices and Systems, Hiroshima University
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Kono Yutaka
Network Memory Design Dept. System Solution Business Unit 4 System Solution Business Group Renesas T
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Noda H
Hitachi Ltd. Kokubunji‐shi Jpn
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Arimoto Kazutami
System Core Technology Div. Renesas Technology Corp.
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Ishizaki Masakatsu
Research Institute For Nanodevice And Bio Systems Hiroshima University
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