Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix Processor(Image Processing and Video Processing)

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概要

• 論文の詳細を見る

• This paper reports an efficient Discrete Cosine Transform (DCT) processing method for images using a massive-parallel memory-embedded SIMD matrix processor. The matrix-processing engine has 2,048 2-bit processing elements, which are connected by a flexible switching network, and supports 2-bit 2,048-way bit-serial and word-parallel operations with a single command. For compatibility with this matrix-processing architecture, the conventional DCT algorithm has been improved in arithmetic order and the vertical/horizontal-space 1 Dimensional (1D)-DCT processing has been further developed. Evaluation results of the matrix-engine-based DCT processing show that the necessary clock cycles per image block can be reduced by 87% in comprison to a conventional DSP architecture. The determined performances in MOPS and MOPS/mm^2 are factors 8 and 5.6 better than with a conventional DSP, rspectively.

• 2007-08-01

著者

• Noda H

  System Core Technology Div. System Solution Business Group Renesas Technology Co.

• Dosaka K

  System Core Technology Div. System Solution Business Group Renesas Technology Co.

• Mattausch Hans

  Hiroshima Univ. Higashihiroshima‐shi Jpn

• Mattausch Hans

  Research Center For Nanodevices And Systems Hiroshima University

• Mattausch Hans

  Hiroshima University

• Saito Kazunori

  System Core Technology Div. System Solution Business Group Renesas Technology Co.

• Dosaka Katsumi

  System Core Technology Div. Renesas Technology Corp.

• Mattausch Hans

  Research Institute For Nanodevice And Bio Systems Hiroshima University

• KOIDE Tetsushi

  Research Center for Nanodevices and Systems, Hiroshima University

• Noda Hideyuki

  System Core Technology Div. System Solution Business Group Renesas Technology Co.

• Koide Tetsushi

  Research Institute For Nanodevice And Bio Systems Hiroshima University

• Koide Tetsushi

  Hiroshima Univ. Higashihiroshima‐shi Jpn

• Koide Tetsushi

  Research Center For Nanodevices And Systems Hiroshima University

• KUMAKI Takeshi

  Research Institute for Nanodevice and Bio Systems, Hiroshima University

• ISHIZAKI Masakatsu

  Research Institute for Nanodevice and Bio Systems, Hiroshima University

• ARIMOTO Kazutami

  System Core Technology Div. System Solution Business Group, Renesas Technology Co.

• KURODA Yasuto

  System Core Technology Div. System Solution Business Group, Renesas Technology Co.

• Kono Yutaka

  Network Memory Design Dept. System Solution Business Unit 4 System Solution Business Group Renesas T

• Noda H

  Hitachi Ltd. Kokubunji‐shi Jpn

• Arimoto Kazutami

  System Core Technology Div. Renesas Technology Corp.

• Ishizaki Masakatsu

  Research Institute For Nanodevice And Bio Systems Hiroshima University

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