On-Chip Memory Power-Cut Scheme Suitable for Low Power SoC Platform
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概要
- 論文の詳細を見る
The proposed built-in Power-Cut scheme intended for a wide range of dynamically data retaining memories including embedded SoC memories enables the system-level power management to handle SoC on which the several high density and low voltage scalable memory macros are embedded. This scheme handles the deep standby mode in which the SoC memories keep the stored data in the ultra low standby current, and quick recovery to the normal operation mode and precise power management are realized, in addition to the conventional full power-off mode in which the SoC memories stay in the negligibly low standby current but allow the stored data to disappear. The unique feature of the statically or dynamically changeable internal voltages of memory in the deep standby mode brings about much further reduction of the standby current. This scheme will contribute to the further lowering power of the mobile applications requiring larger memory capacity embedded SoC memories.
- （社）電子情報通信学会の論文
- 2009-03-01
著者
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MORISHITA Fukashi
Renesas Technology Corp.
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Dosaka K
System Core Technology Div. System Solution Business Group Renesas Technology Co.
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Dosaka Katsumi
System Core Technology Div. Renesas Technology Corp.
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ARIMOTO Kazutami
System Core Technology Div. System Solution Business Group, Renesas Technology Co.
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SHIMANO Hiroki
System Core Technology Div., Renesas Technology Corp.
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MORISHITA Fukashi
System Core Technology Div., Renesas Technology Corp.
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Shimano Hiroki
System Core Technology Div. Renesas Technology Corp.
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Arimoto Kazutami
System Core Technology Div. Renesas Technology Corp.
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Morishita Fukashi
System Core Technology Div. Renesas Technology Corp.
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Morishita Fukashi
Renesas Technology Corporation
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