A Capacitorless Twin-Transistor Random Access Memory (TTRAM) on SOI(Memory,<Special Section>Low-Power, High-Speed LSIs and Related Technologies)

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概要

• 論文の詳細を見る

• We propose a novel capacitorless twin-transistor random access memory (TTRAM). The 2Mb test device has been fabricated on 130nm SOI-CMOS process. We demonstrate the TTRAM cell has two data-storage states and confirm the data retention time of 100ms at 80℃. TTRAM process is compatible with the conventional SOI-CMOS and never requires any additional processes. A 6.1ns row-access time is achieved and 250MHz operation can be realized by using 2 bank 8 b-burst mode.

• 社団法人電子情報通信学会の論文
• 2007-04-01

著者

• ARIMOTO Kazutami

  Renesas Technology

• MORISHITA Fukashi

  Renesas Technology Corp.

• NODA Hideyuki

  Renesas Technology Corp.

• DOSAKA Katsumi

  Renesas Technology Corp.

• Noda H

  System Core Technology Div. System Solution Business Group Renesas Technology Co.

• Dosaka K

  System Core Technology Div. System Solution Business Group Renesas Technology Co.

• Maegawa Shigeto

  Renesas Technology Corp.

• Ipposhi Takashi

  Renesas Technology Corp.

• Hayashi I

  Renesas Technology Corp.

• GYOHTEN Takayuki

  System Core Technology Div. System Solution Business Group, Renesas Technology Co.

• HAYASHI Isamu

  Renesas Technology Corp.

• GYOHTEN Takayuki

  Renesas Technology Corp.

• OKAMOTO Mako

  Daioh Electric Corp.

• Noda H

  Hitachi Ltd. Kokubunji‐shi Jpn

• Dosaka Katsumi

  Renesas Electronics Corp. Itami‐shi Jpn

• Gyohten Takayuki

  System Core Technology Div. System Solution Business Group Renesas Technology Co.

• Arimoto Kazutami

  System Core Technology Div. Renesas Technology Corp.

• Morishita Fukashi

  System Core Technology Div. Renesas Technology Corp.

• Morishita Fukashi

  Renesas Technology Corporation

• Arimoto Kazutami

  Renesas Electronics Corp.

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