MOSFET Harmonic Distortion up to the Cutoff Frequency : Measurement and Theoretical Analysis
スポンサーリンク
概要
- 論文の詳細を見る
- 2005-09-13
著者
-
Mattausch Hans
Hiroshima Univ. Higashihiroshima‐shi Jpn
-
Mattausch Hans
Research Center For Nanodevices And Systems Hiroshima University
-
MIURA MATTAUSCH
Graduate School of Advanced Sciences of Matter, Hiroshima University
-
Mattausch Hans
Hiroshima University
-
OHGURO Tatsuya
Semiconductor Technology Academic Research Center
-
IIZUKA Takahiro
Semiconductor Technology Academic Research Center
-
TAGUCHI Masahiko
Semiconductor Technology Academic Research Center
-
MIYAMOTO Shunsuke
Semiconductor Technology Academic Research Center
-
EZAKI Tatsuya
Graduate School of Advanced Science of Matter, Hiroshima University
-
Ohguro Tatsuya
Department Of Physics Faculty Of Science Hokkaido University
-
Kumashiro Shigetaka
Semiconductor Technology Academic Research Center
-
Kumashiro S
Ulsi Device Development Division Nec Corporation
-
Mattausch Hans
Research Institute For Nanodevice And Bio Systems Hiroshima University
-
Navarro Dondee
Graduate School Of Advanced Sciences Of Matter Hiroshima University
-
Ezaki Tatsuya
Graduate School Of Advanced Science Of Matter Hiroshima University
-
Mizoguchi Takeshi
Semiconductor Technology Academic Research Center
-
TAKEDA Youichi
Graduate School of Advanced Sciences of Matter, Hiroshima University
-
Miura‐mattausch M
Hiroshima Univ. Higashi‐hiroshima Jpn
-
Miura Mattausch
Graduate School Of Advanced Sciences Of Matter Hiroshima University
-
Takeda Youichi
Graduate School Of Advanced Sciences Of Matter Hiroshima University
-
CHIBA Shingo
Graduate School of Advanced Sciences of Matter, Hiroshima University
-
Chiba Shingo
Graduate School Of Advanced Sciences Of Matter Hiroshima University
-
Ohguro Tatsuya
Semiconductor Company Toshiba Corporation
-
Ezaki Tatsuya
Graduate School Of Advanced Sciences Of Matter Hiroshima University
-
Matsumoto S
Semiconductor Technology Academic Research Center
-
Miura-mattausch Mitiko
Hiroshima-university
-
NAVARRO Dondee
Graduate School of Advanced Sciences of Matter, Hiroshima University
関連論文
- 4-Port Unified Data/Instruction Cache Design with Distributed Crossbar and Interleaved Cache-Line Words(Integrated Electronics)
- Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix Processor(Image Processing and Video Processing)
- Suppressed short-channel effect of DG-MOSFET and its modeling
- Compact Double-Gate Metal-Oxide-Semiconductor Field Effect Transistor Model for Device/Circuit Optimization
- Degraded Frequency-Tuning Range and Oscillation Amplitude of LC-VCOs due to the Nonquasi-Static Effect in MOS Varactors
- Non-Quasi-Static Carrier Dynamics of MOSFETs under Low-Voltage Operation
- R-matrix Theory of Quantum Transport in Nanoscale Electronic Devices
- Coarse-Grain 3D Quantum Simulations of Nanoscale MOSFET
- Magnetic Susceptibility and Superconductivity in (La_Sr_x)_2CuO_4
- Realization of K-Nearest-Matches Search Capability in Fully-Parallel Associative Memories(VLSI Design Technology and CAD)
- Circuit-Simulation Model of C_ Changes in Small-Size MOSFETs Due to High Channel-Field Gradients(the IEEE International Conference on SISPAD '02)
- A Compact Model of the Pinch-off Region of 100nm MOSFETs Based on the Surface-Potential(Semiconductor Materials and Devices)
- 1/f-Noise Characteristics in 100 nm-MOSFETs and Its Modeling for Circuit Simulation(Semiconductor Materials and Devices)
- Quantum Effect in Sub-0.1μm MOSFET with Pocket Technologies and Its Relevance for the On-Current Condition
- Circuit Simulation Models for Coming MOSFET Generations(Special Section of Selected Papers from the 14th Workshop on Circuits and Systems in Karuizawa)
- Shot noise modeling in metal-oxide-semiconductor field effect transistors under sub-threshold Condition
- Scalable Parasitic Components Model of CMOS for RF Circuit Design
- Integration Architecture of Content Addressable Memory and Massive-Parallel Memory-Embedded SIMD Matrix for Versatile Multimedia Processor
- Scalable FPGA/ASIC Implementation Architecture for Parallel Table-Lookup-Coding Using Multi-Ported Content Addressable Memory(Image Processing and Video Processing)
- Real-Time Huffman Encoder with Pipelined CAM-Based Data Path and Code-Word-Table Optimizer(Image Processing and Video Processing)
- A Reliability-Enhanced TCAM Architecture with Associated Embedded DRAM and ECC(Novel Device Architectures and System Integration Technologies)
- A CAM-Based Signature-Matching Co-processor with Application-Driven Power-Reduction Features(Integrated Electronics)
- Embedded Low-Power Dynamic TCAM Architecture with Transparently Scheduled Refresh(Memory, Low-Power LSI and Low-Power IP)
- Boundary-Active-Only Adaptive Power-Reduction Scheme for Region-Growing Video-Segmentation(Image Processing and Video Processing)
- Digital Low-Power Real-Time Video Segmentation by Region Growing
- 100 nm-MOSFET Model for Circuit Simulation : Challenges and Solutions(Devices and Circuits for Next Generation Multi-Media Communication Systems)
- Carrier Transport Model for Lateral p-i-n Photodiode in High-Frequency Operation
- Analysis of Within-Die Complementary Metal--Oxide--Semiconductor Process Variation with Reconfigurable Ring Oscillator Arrays Using HiSIM
- Modeling of Reduced Surface Field Laterally Diffused Metal Oxide Semiconductor for Accurate Prediction of Junction Condition on Device Characteristics
- MOSFET Harmonic Distortion up to the Cutoff Frequency : Measurement and Theoretical Analysis
- 100 nm-MOSFET Model for Circuit Simulation : Challenges and Solutions
- A Bulk-Current Model for Advanced MOSFET Technologies Without Binning : Substrate Current and Fowler-Nordheim Current
- A Gate-Current Model for Advanced MOSFET Technologies Implemented into HiSIM2
- Fast and Compact Central Arbiter for High Access-Bit-Rate Multi-Port Caches
- Implementation of the Bloch Operator Method for Solving the Poisson Equation
- A PN Junction-Current Model for Advanced MOSFET Technologies
- Bank-Type Associative Memory for High-Speed Nearest Manhattan Distance Search in Large Reference-Pattern Space
- Carrier Transport Model for Lateral p-i-n Photodiodes at High-Frequency Operation
- Shot Noise Measurement in p-i-n Diode and Its Analysis
- Efficient Video-Picture Segmentation Algorithm for Cell-Network-Based Digital CMOS Implementation(Image Processing, Image Pattern Recognition)
- Advanced Process/Device Modeling and Its Ompact on the CMOS Design Solution (Special lssue on SISPAD'99)
- Surface-Potential-Based MOS-Varactor Model for RF Applications
- Enhanced Quantum Effect for Sub-0.1μm Pocket Technologies and Its Relevance for the On-Current Condition
- Frequency Dependence of Measured MOSFET Distortion Characteristic
- Prediction of Circuit-Performance Variations from Technology Variations for Reliable 100nm SOC Circuit Design
- High Speed Frequency-Mapping-Based Associative Memory Using Compact Multi-Bit Encoders and a Path-Selecting Scheme (Special Issue : Solid State Devices and Materials (2))
- Low-Power Silicon-Area-Efficient Image Segmentation Based on a Pixel-Block Scanning Architecture
- Solution of the Poisson Equation with Coulomb Singularities
- Software-Based Parallel Cryptographic Solution with Massive-Parallel Memory-Embedded SIMD Matrix Architecture for Data-Storage Systems
- A K-Means-Based Multi-Prototype High-Speed Learning System with FPGA-Implemented Coprocessor for 1-NN Searching
- Experimental Analysis of Within-Die Process Variation in 65 and 180 nm Complementary Metal--Oxide--Semiconductor Technology Including Its Distance Dependences
- Unified Reaction--Diffusion Model for Accurate Prediction of Negative Bias Temperature Instability Effect
- Compact Modeling of Expansion Effects in LDMOS
- Surface-Potential-Based Metal–Oxide–Silicon-Varactor Model for RF Applications
- Laterally Diffused Metal Oxide Semiconductor Model for Device and Circuit Optimization
- Mixed Digital–Analog Associative Memory Enabling Fully-Parallel Nearest Euclidean Distance Search
- Automatic Pattern-Learning Architecture Based on Associative Memory and Short/Long Term Storage Concept
- Frequency Dependence of Measured Metal Oxide Semiconductor Field-Effect Transistor Distortion Characteristic
- Modeling of Trench-Gate Type HV-MOSFETs for Circuit Simulation
- Compact Modeling of Expansion Effects in LDMOS