Advanced Process/Device Modeling and Its Ompact on the CMOS Design Solution (Special lssue on SISPAD'99)
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概要
- 論文の詳細を見る
This paper reports the application results of the state-of-the art advanced process/device modeling to the 0.13 [μm] CMOS design solution. It has been demonstrated that the S/D-extension junction depth, the well profile, the channel profile and the drive current of the 0.13 [μm] CMOS can be predicted with reasonable accuracy. Further model improvement is required to predict the ΔL and the Vt-Lg characteristics of the devices with the tilted pocket I/I more accurately. It is quite beneficial to construct several design maps by using the state-of-the-art advanced TCAD in a 'carpet bombing' way in the early stage of the development of new generation CMOS.
- 社団法人電子情報通信学会の論文
- 2000-08-25
著者
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Kumashiro Shigetaka
Semiconductor Technology Academic Research Center
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Kumashiro S
Ulsi Device Development Division Nec Corporation
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Kumashiro Shigetaka
Ulsi Device Development Laboratories Nec Corporation
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- 1/f-Noise Characteristics in 100 nm-MOSFETs and Its Modeling for Circuit Simulation(Semiconductor Materials and Devices)
- Quantum Effect in Sub-0.1μm MOSFET with Pocket Technologies and Its Relevance for the On-Current Condition
- Circuit Simulation Models for Coming MOSFET Generations(Special Section of Selected Papers from the 14th Workshop on Circuits and Systems in Karuizawa)
- MOSFET Harmonic Distortion up to the Cutoff Frequency : Measurement and Theoretical Analysis
- A Precise SOI Film Thickness Measurement Including Gate Depletion and Quantum Effects
- Advanced Process/Device Modeling and Its Ompact on the CMOS Design Solution (Special lssue on SISPAD'99)
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