An LSI for Low Bit-Rate Image Compression Using Vector Quantization(Special Issue on Multimedia, Network, and DRAM LSIs)
スポンサーリンク
概要
- 論文の詳細を見る
We have developed and fabricated an LSI called the FMPP-VQ64. The LSI is a memory-based shared-bus SIMD parallel processor containing 64 PEs, intended for low bit-rate image compression using vector quantization. It accelerates the nearest neighbor search (NNS) during vector quantization. The computation time does not depend on the number of code vectors. The FMPP-VQ64 performs 53, 000 NNSs per second, while its power dissipation is 20 mW. It can be applied to the mobile telecommunication system.
- 社団法人電子情報通信学会の論文
- 1998-05-25
著者
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小野寺 秀俊
京都大学工学部電子工学科
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Kobayashi K
Toyama Prefectural Univ. Toyama‐ken Jpn
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Onodera H
Kyoto Univ. Kyoto‐shi Jpn
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Onodera Hidetoshi
Kyoto Univ. Kyoto‐shi Jpn
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小野寺 秀俊
滋賀県立大学工学部
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ONODERA Hidetoshi
the Department of Communications and Computer Engineering, Kyoto University
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Kobayashi Kensuke
The Author Is With Lecroy Corp.
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小野寺 秀俊
京都大学大学院工学研究科電子通信工学専攻
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Onodera Hidetoshi
The Department Of Communications And Computer Engineering Kyoto University
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Kobayashi Kazutoshi
The Department Of Communications And Computer Engineering Kyoto University
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TAMARU Keikichi
Okayama University of Science
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NAKAMURA Noritsugu
the Department of Electronics and Communication, Graduate School of Engineering, Kyoto University
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TERADA Kazuhiko
the Department of Electronics and Communication, Graduate School of Engineering, Kyoto University
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TAMARU Keikichi
the Department of Electronics and Communication, Graduate School of Engineering, Kyoto University
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Kobayashi K
The Author Is With Lecroy Corp.
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Tamaru K
Okayama University Of Science
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Nakamura Noritsugu
The Department Of Electronics And Communication Graduate School Of Engineering Kyoto University
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Onodera Hidetoshi
The Department Of Communications And Computer Engineering Graduate School Of Informatics Kyoto Unive
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