A Bit-Parallel Block-Parallel Functional Memory Type Parallel Processor Architecture (Special Issue on New Architecture LSIs)
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概要
- 論文の詳細を見る
We propose a new architecture of Functional Memory type Parallel Processor (FMPP) architectures called bit-parallel block-parallel (BPBP) FMPP. Design details of a prototype BPBP FMPP chip are also shown. FMPP is a massively parallel processor architecture that has a memory-based simple two-dimensional regular array structure suitable for memory VLSI technology. Computation space increases as integration density of memory increases. Computation time does not depend on the number of processors. So far, a bit-serial word-parallel (BSWP) implementation based on a content addressable memory (CAM) is mainly investigated as one of promising architectures of FMPP. In a BSWP FMPP, each word of a CAM works as a processor, and the amount of hardware is minimized by adopting a bit-serial operation, thus maximizing integration scale. The BSWP FMPP, however, does not allow operations between two words, which restriction limits the applicability of the BSWP FMPP. On the other hand, the proposed BPBP FMPP is designed to execute logical and arithmetic operations on two words. These operations are performed simultaneously on every group of words called a block. BPBP FMPP hereby achieves a high performance while maintaining high integration density of the BSWP, and is suitable for various applications.
- 社団法人電子情報通信学会の論文
- 1993-07-25
著者
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小野寺 秀俊
京都大学工学部電子工学科
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Kobayashi K
Toyama Prefectural Univ. Toyama‐ken Jpn
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Onodera H
Kyoto Univ. Kyoto‐shi Jpn
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Onodera Hidetoshi
Kyoto Univ. Kyoto‐shi Jpn
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Yasuura Hiroto
Faculty Of Engineering Kyoto University
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小野寺 秀俊
滋賀県立大学工学部
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Kobayashi Kensuke
The Author Is With Lecroy Corp.
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KOBAYASHI Kazutoshi
Faculty of Engineering, Kyushu University
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小野寺 秀俊
京都大学大学院工学研究科電子通信工学専攻
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Onodera Hidetoshi
Faculty of Engineering, Kyoto University
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Tamaru Keikichi
Faculty of Engineering, Kyoto University
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Onodera Hidetoshi
Faculty Of Engineering Kyoto University
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Kobayashi Kazutoshi
Faculty Of Engineering Kyushu University
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TAMARU Keikichi
Okayama University of Science
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Kobayashi K
The Author Is With Lecroy Corp.
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Yasuura Hiroto
Faculty Of Engineering Kyushu University
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Tamaru K
Okayama University Of Science
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Tamaru Keikichi
Faculty Of Elctronics Kyoto University
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