Development of procedure for modeling MOSFET compatible with ITRS: noise and 1-5 characteristics modeling for RF/analog MOSFET (集積回路)
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概要
- 論文の詳細を見る
A procedure for modeling MOSFET compatible with ITRS is proposed. Compared to the PTM, this work focuses on how to generate the predictive MOSFET model cards. Achieving the predictive MOSFET model cards from digital to RF/analog circuit design, this procedure facilitates early design research and supports joint technology-design exploration for optimal nanoscale integration.
- 社団法人電子情報通信学会の論文
- 2010-12-09
著者
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小野寺 秀俊
京都大学工学部電子工学科
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Onodera H
Kyoto Univ. Kyoto‐shi Jpn
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Onodera Hidetoshi
Kyoto Univ. Kyoto‐shi Jpn
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Onodera Hidetoshi
Department Of Communications And Computer Engineering Graduate School Of Informatics Kyoto Universit
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小野寺 秀俊
滋賀県立大学工学部
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Tsuchiya Akira
Department Of Communications And Computer Engineering Kyoto University
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小野寺 秀俊
京都大学大学院工学研究科電子通信工学専攻
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KIM Sin-Nyoung
Department of Communications and Computer Engineering, Kyoto University
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Kim Sin-nyoung
Department Of Communications And Computer Engineering Kyoto University
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小野寺 秀俊
京都大学情報学研究科通信情報システム専攻:京都大学光・電子理工学教育研究センター
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Onodera Hidetoshi
Department of Communication and Computer Engineering, Graduate School of Informatics, Kyoto University, Kyoto 606-8501, Japan
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