Design Optimization Methodology for On-Chip Spiral Inductors(<Special Section>Analog Circuit and Device Technologies)
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概要
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This paper presents a methodology for optimizing the lay-out of on-chip spiral inductors using structural parameters and design firequency in a response surface method. The proposed method uses scattering parameters (S-parameter) to express inductor characteristics, and hence is independent of spiral geometries and equivalent circuit models. The procedure of inductor optimization is described, and a design example is presented.
- 社団法人電子情報通信学会の論文
- 2004-06-01
著者
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OKADA Kenichi
the Department of Communications and Computer Engineering, Kyoto University
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HOSHINO Hiroaki
the Department of Communications and Computer Engineering, Kyoto University
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ONODERA Hidetoshi
the Department of Communications and Computer Engineering, Kyoto University
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Onodera Hidetoshi
The Department Of Communications And Computer Engineering Kyoto University
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Hoshino Hiroaki
The Department Of Communications And Computer Engineering Kyoto University
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Okada Kenichi
The Department Of Communications And Computer Engineering Kyoto University
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Onodera Hidetoshi
The Department Of Communications And Computer Engineering Graduate School Of Informatics Kyoto Unive
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