Measurement of Energetic and Lateral Distribution of Interface State Density in FD SOI MOSFETs
スポンサーリンク
概要
- 論文の詳細を見る
- 1998-09-07
著者
-
Shi Yi
Institute Of Industrial Science University Of Tokyo:department Of Physics Nanjing University
-
Duyet Tran
Institute Of Industrial Science University Of Tokyo
-
Hiramoto Toshiro
Institute Of Industrial Science University Of Tokyo
-
Hiramoto Toshiro
Institute Of Industrial Science The University Of Tokyo
-
Shi Yi
Institute Of Biophysics Academia Sinica
-
ISHIKURO Hiroki
Institute of Industrial Science, University of Tokyo
-
SARAYA Takuya
Institute of Industrial Science, University of Tokyo
-
TAKAMIYA Makoto
Institute of Industrial Science, University of Tokyo
-
SARAYA Takuya
The Institute of Industrial Science, The University of Tokyo
-
Ishikuro H
Univ. Tokyo Tokyo Jpn
-
Ishikuro Hiroki
Institute Of Industrial Science University Of Tokyo
-
Takamiya Makoto
Institute Of Industrial Science University Of Tokyo
-
Takamiya Makoto
Institute Of Industrial Science The University Of Tokyo
-
Saraya Takuya
The Institute Of Industrial Science The University Of Tokyo
-
SARAYA Takuya
Institute Industrial Science, The University of Tokyo
-
HIRAMOTO Toshiro
Institute Industrial Science, The University of Tokyo
関連論文
- 微細トランジスタにおける特性ばらつきの現状と将来動向(低電圧/低消費電力技術,新デバイス・回路とその応用)
- 新規格化法を用いた工場/製品/水準間比較によるシリコンMOSFETのランダムしきい値ばらつき評価
- 新規格化法を用いたファブ/テクノロジ/水準間比較によるランダムしきい値ばらつき評価(IEDM(先端CMOSデバイス・プロセス技術))
- 微細MOSデバイスにおけるランダムばらつき(プロセス・デバイス・回路シミュレーション及び一般)
- 1.MOSトランジスタのスケーリングに伴う特性ばらつき(CMOSデバイスの微細化に伴う特性ばらつきの増大とその対策)
- 増大する微細MOSトランジスタの特性ばらつき : 現状と対策
- シリコン技術
- (110)SOI基板上に作製したGAAシリコンナノワイヤの移動度評価(低電圧/低消費電力技術、新デバイス・回路とその応用)
- SRAM : 低電圧化とばらつきへの挑戦(VLSI回路,デバイス技術(高速,低電圧,低消費電力))
- SRAM: 低電圧化とばらつきへの挑戦(VLSI回路,デバイス技術(高速,低電圧,低消費電力))
- 微細トランジスタにおける特性ばらつきの現状と将来動向(低電圧/低消費電力技術,新デバイス・回路とその応用)
- 「電流立上り電圧」ばらつきに起因する微細MOSトランジスタのランダム電流ばらつきの解析(低電圧/低消費電力技術,新デバイス・回路とその応用)
- DMA TEGによるSRAMのスタティックノイズマージンの直接測定と解析(低電圧/低消費電力技術,新デバイス・回路とその応用)
- 「電流立上り電圧」ばらつきに起因する微細MOSトランジスタのランダム電流ばらつきの解析(デバイス,低電圧/低消費電力技術,新デバイス・回路とその応用)
- DMA TEGによるSRAMのスタティックノイズマージンの直接測定と解析(高信頼技術,低電圧/低消費電力技術,新デバイス・回路とその応用)
- 膜厚5nm以下の(110)面ダブルゲート極薄SOI nMOSFETにおけるボリュームインバージョンによる移動度向上(先端CMOSデバイス・プロセス技術)
- VTCMOSに最適な基板バイアス係数可変完全空乏型SOI MOSFET(VLSI回路, デバイス技術(高速・低電圧・低消費電力))
- VTCMOSに最適な基板バイアス係数可変完全空乏型SOI MOSFET(VLSI回路, デバイス技術(高速・低電圧・低消費電力))
- C-11-1 微細MOSトランジスタの特性ばらつきの研究(C-11.シリコン材料・デバイス,一般セッション)
- Untitled - Foreword
- 極薄膜SOIトランジスタにおける量子効果による移動度向上(ゲートスタック構造の新展開(I),ゲート絶縁膜,容量膜,機能膜及びメモリ技術)
- Investigation of the Polarization-Induced Charges in Modulatlon Doped Al_xGa_N/GaN Heterostructures through Capacitance-Voltage Profiling and Simulation
- Influence of Ferroelectric Polarization on the Properties of Two-Dimensional Electron Gas in Pb(Zr_Ti_)O_3/Al_xGa_N/GaN Structures
- 薄膜BOX完全空乏型SOI MOSFETにおけるばらつきの影響(VLSI回路,デバイス技術(高速,低電圧,低消費電力))
- 薄膜BOX完全空乏型SOI MOSFETにおけるばらつきの影響(VLSI回路,デバイス技術(高速,低電圧,低消費電力))
- 1P034 Conformational analysis of trigger factor and its mutant(1. Protein structure and dynamics (I),Poster Session,Abstract,Meeting Program of EABS & BSJ 2006)
- Random Threshold Voltage Variability Induced by Gate-Edge Fluctuations in Nanoscale Metal-Oxide-Semiconductor Field-Effect Transistors
- Si(110)面正孔移動度における方向依存性の起源 : 極薄SOIを用いた実験的考察(IEDM特集(先端CMOSデバイス・プロセス技術))
- 膜厚4nm以下の(110)面極薄SOIシングルゲート/ダブルゲートn/p MOSFETにおける一軸引っ張り歪みによる移動度向上(IEDM(先端CMOSデバイス・プロセス技術))
- SOI膜厚5nmの(100)面極薄nMOSFETにおける移動度ユニバーサリティ(デバイス,VLSI回路,デバイス技術(高速,低電圧,低消費電力))
- SOI膜厚5nmの(100)面極薄nMOSFETにおける移動度ユニバーサリティ(デバイス, VLSI回路,デバイス技術(高速,低電圧,低消費電力))
- (110)面方向pMOSFETにおける移動度ユニバーサリティ崩壊の実証(VLSI回路,デバイス技術(高速,低電圧,低消費電力))
- (110)面方向pMOSFETにおける移動度ユニバーサリティ崩壊の実証(VLSI回路,デバイス技術(高速,低電圧,低消費電力))
- (110)面〈100〉方向pMOSFETにおける移動度ユニバーサリティ崩壊の実証
- Room Temperature Coulomb Blockade and Low Temperature Hopping Transport in a Multiple-Dot-Channel Metal-Oxide-Semiconductor Field-Effect-Transistor ( Quantum Dot Structures)
- Fabrication of Si Nanostructures for Single Electron Device Applications by Anisotropic Etching
- Modeling of Body Factor and Subthreshold Swing in Short Channel Bulk MOSFETs
- Mobility Increase in High-Ns Region in (110)-Oriented UTB pMOSFET Through Surface Roughness Improvement
- Very Sharp Room-Temperature Negative Differential Conductance in Silicon Single-Hole Transistor with High Voltage Gain
- Experimental Study on the Universality of Mobility Behavior in Ultra Thin Body Metal Oxide Semiconductor Field Effect Transistors
- Temperature Dependence of Off-Current in Bulk and Fully Depleted SOI MOSFETs
- Temperature Dependence of Off-Current in Bulk and FD SOI MOSFETs
- (マイクロマシン)
- High Performance Accumulated Back-Interface Dynamic Threshold SOI MOS-FET's (AB-DTMOS) with Large Body Effect at Low Supply Voltage
- (110)SOI基板上に作製したGAAシリコンナノワイヤの移動度評価(低電圧/低消費電力技術、新デバイス・回路とその応用)
- シリコンナノワイヤpMOSFET及び室温動作単正孔トランジスタにおける一軸歪みの効果(機能ナノデバイス及び関連技術)
- シリコンナノワイヤpMOSFET及び室温動作単正孔トランジスタにおける一軸歪みの効果(機能ナノデバイス及び関連技術)
- Beyond CMOS とは?
- 基板バイアス係数可変完全空乏型SOI MOSFETの短チャネル特性評価(IEDM(先端CMOSデバイス・プロセス技術))
- 6.新構造MOSトランジスタ技術(サブ100nm時代のシステムLSIとビジネスモデル)
- Device Design of Nanoscale MOSFETs Considering the Suppression of Short Channel Effects and Characteristics Variations(Device,Low-Power, High-Speed LSIs and Related Technologies)
- Short-Channel Characteristics of Variable-Body-Factor Fully-Depleted Silicon-On-Insulator Metal-Oxide-Semiconductor-Field-Effect-Transistors
- Short Channel Characteristics of Variable Body Factor FD SOI MOSFETs
- Variable Body Effect Factor Fully Depleted Silicon-On-Insulator Metal Oxide Semiconductor Field Effect Transistor for Ultra Low-Power Variable-Threshold-Voltage Complementary Metal Oxide Semiconductor Applications
- Future Electron Devices and SOI Technology : Semi-Planar SOI MOSFETs with Sufficient Body Effect
- Charge Polarity Dependence of Negative Differential Conductance in Room-Temperature Operating Silicon Single-Charge Transistors
- Evidence for Creation of Gallium Antisite Defect in Surface Region of Bleat-Treated GaAs
- Effects of Dot Size and its Distribution on Electron Number Control in Metal-Oxide-Semiconductor-Field-Effect-Transistor Memories Based on Silicon Nanocrystal Floating Dots
- Characteristic Distributions of Narrow Channel Metal-Oxide-Semiconductor Field-Effect Transistor Memories with Silicon Nanocrystal Floating Gates
- Effects of Channel Thinning on Threshold Voltage Shift in Ultrathin-Body Silicon Nanocrystal Memories
- Large Threshold Voltage Shift and Narrow Threshold Voltage Distribution in Ultra Thin Body Silicon Nanocrystal Memories
- Optimum Device Parameters and Scalability of Variable Threshold Voltage Complementary MOS (VTCMOS)
- Optimum Condutions of Body Effect Factor and Substrate Bias in Variable Threshold Voltage MOSFETs
- Optimum Conditions of Body Effect Factor and Substrate Bias in Variable Threshold Voltage MOSFETs
- Investigation of Switching Kinetics of Interface Traps in Metal-Oxide-Semiconductor-Field-Effect-Transistors with Ultra-narrow Channels
- Precipitation of Cu and Fe in Dislocated Floating-Zone-Grown Silicon
- Measurement of Energetic and Lateral Distribution of Interface State Density in Fully-Depleted Silicon on Insulator Metal-Oxide-Semiconductor Field-Effect Transistors
- High-Performance Accumulated Back-Interface Dynamic Threshold SOI MOSFET (AB-DTMOS) with Large Body Effect at Low Supply Voltage
- Measurement of Energetic and Lateral Distribution of Interface State Density in FD SOI MOSFETs
- Suppression of Geometric Component of Charge Pumping Current in Thin Film Silicon on Insulator Metal-Oxide-Semiconductor Field-Effect Transistors
- New Measurement Technique for Sub-Bandgap Impact Ionization Current by Transient Characteristics of Partially Depleted SOI MOSFETs
- Characteristics of Narrow Channel MOSFET Memory Based on Silicon Nanocrystals
- Effects of Interface Traps on Charge Retention Characteristics in Silicon-Quantum-Dot-Based Metal-Oxide-Semiconductor Diodes
- Characteristics of Narrow Channel MOSFET Memory Based on Silicon Nanocrystals
- Extremely Large Amplitude Random Telegraph Signals in a Very Narrow Split-Gate MOSFET at Low Temperatures
- Extremely Large Amplitude of Random Telegraph Signals in a Very Narrow Split-Gate MOSFET at Low Temperatures
- Re-Examination of Impact of Intrinsic Dopant Fluctuations on Static RAM (SRAM) Static Noise Margin
- Large Electron Addition Energy above 250 meV in a Silicon Quantum Dot in a Single-Electron Transistor
- 面方位(110)極薄SOI pMOSFETにおける高移動度の実験的検証(VLSI回路, デバイス技術(高速・低電圧・低消費電力))
- 集積シリコン単電子トランジスタ回路を用いた電流スイッチング及びアナログパターンマッチングの室温実証(IEDM特集(先端CMOSデバイス・プロセス技術))
- Suppression of Stand-by Tunnel Current in Ultra-Thin Gate Oxide MOSFETs by Dual Oxide Thickness-Multiple Threshold Voltage CMOS(DOT-MTCMOS)
- Tunneling Barrier Structures in Room-Temperature Operating Silicon Single-Electron and Single-Hole Transistors
- Origin of Critical Substrate Bias in Variable Threshold Voltage Complementary MOS (VTCMOS)
- Origin of Critical Substrate Bias in Variable Threshold Voltage CMOS
- Special Issue on Advanced Sub-0.1 μm CMOS Devices
- Mobility Degradation in (110)-Oriented Ultra-thin Body Double-Gate pMOSFETs with SOI Thickness of less than 5nm
- Large Coulomb-Blockade Oscillations and Negative Differential Conductance in Silicon Single-Electron Transistors with [100]- and [110]-Directed Channels at Room Temperature
- Room Temperature Demonstration of Variable Full Width at Half Maximum of Coulomb Oscillation in Silicon Single-Hole Transistor
- Reverse Short-Channel Effect of Body Factor in Low-Fin Field-Effect Transistors Induced by Corner Effect
- Low Power and Low Voltage MOSFETs with Variable Threshold Voltage Controlled by Back-Bias (Special Issue on Low-Power High-Speed CMOS LSI Technologies)
- Effects of Discrete Quantum Levels on Electron Transport in Silicon Single-Electron Transistors with an Ultra-Small Quantum Dot
- Re-examination of Impact of Intrinsic Dopant Fluctuations on SRAM Static Noise Margin
- Impact of Drain Induced Barrier Lowering on Read Scheme in Silicon Nanocrystal Memory with Two-Bit-per-Cell Operation
- Room-Temperature Observation of Negative Differential Conductance Due to Large Quantum Level Spacing in Silicon Single-Electron Transistor
- Suppression of Stand-by Tunnel Current in Ultra-Thin Gate Oxide MOSFETs by Dual Oxide Thickness MTCMOS(DOT-MTCMOS)
- 微細MOSFETの特性ばらつきに関する最近の動向について
- Large Temperature Dependence of Coulomb Blockade Oscillations in Room-Temperature Operating Silicon Single-Hole Transistor
- Room-Temperature Operation of Current Switching Circuit Using Integrated Silicon Single-Hole Transistors
- Origin of Larger Drain Current Variability in N-Type Field-Effect Transistors Analyzed by Variability Decomposition Method
- Measurement of Energetic and Lateral Distribution of Interface State Density in Fully-Depleted Silicon on Insulator Metal-Oxide-Semiconductor Field-Effect Transistors