A 500℃ fabrication process for MIM capacitors-based on a Ta_2O_5/Nb_2O_5 bilayer with high permittivity-for DRAM and SoC applications
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概要
- 論文の詳細を見る
- 2004-09-15
著者
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Hiratani M
Central Research Laboratory Hitachi Ltd.
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Hiratani M
Central Research Laboratory Hitachi Ltd
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Hiratani Masahiko
Central Research Laboratory Hitachi Ltd.
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Matsui Yasushi
Electronics Research Laboratory Corporate Research & Development Matsushita Electronics Corporat
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ASANO Isamu
ELPIDA MEMORY, Inc.
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Matsui Y
Nims Tsukuba Jpn
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MATSUI Yuichi
Central Research Laboratory, Hitachi, Ltd.
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Asano Isamu
Elpida Memory Inc.
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MATSUI Yoshio
Environmental Pollution Research Institute of Nagoya City
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Matsui Y
Central Research Laboratory Hitachi Ltd.
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Asano I
Elpida Memory Inc. Kanagawa Jpn
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MATUSI Yasuji
Product Development Laboratory, Mitsubishi Electric Corporation
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