Improvement of Uniformity and Reliability of Scaled-Down Cu Interconnects with Carbon-Rich Low-$k$ Films
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概要
- 論文の詳細を見る
Highly selective dry-etching processes are developed for conventional via-first (VF) pattering sequences to fabricate reliable Cu dual-damascene interconnects (DDI) in carbon-rich low-$k$ films, such as a molecular-pore-stack (MPS) SiOCH film ($k = 2.55$). The carbon-rich MPS film, which had excellent endurance against plasma-processes, acted as etching stopper during hard-mask (HM)-etching on it, and the high selectivity of trench-HM etching reduced variability of over-etching depth in the MPS film. This effect reduced variability in trench-depth in the MPS film, or interconnect characteristics such as capacitance--resistance ($C$--$R$) time delay. The via yield and reliability were influenced also by via-etch selectivity of MPS against SiCN cap underlain. We found that the SiCN thickness remained after the via etch should be greater than 10 nm to prevent Cu from oxidation by O2 ashing step followed. Chemical-reaction-enhanced gas chemistry in N2--CFX--Ar system, i.e., high N2/Ar ratio under limited CFX supply, increased the etching selectivity of MPS to keep enough thickness of SiCN. Early-failure-mode in electro-migration test was suppressed by the high selective via-etch. Precise selectivity control for robust carbon-rich low-$k$ films was very important to achieve the low variability and high reliability of scaled-down Cu interconnects.
- 2011-04-25
著者
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林 喜宏
NECシステムデバイス研究所
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林 喜宏
日本電気株式会社デバイスプラットフォーム研究所
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林 喜宏
日本電気株式会社マイクロエレクトロニクス研究所 超高集積回路研究部
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HAYASHI Yoshihiro
Device Platforms Research Labs., NEC.
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Hayashi Yoshihiro
Nec Corporation
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Inoue Naoya
LSI Research Laboratory, Renesas Electronics Corporation, 1120 Shimokuzawa, Chuo-ku, Sagamihara 252-5298, Japan
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Kume Ippei
LSI Research Laboratory, Renesas Electronics Corporation, 1120 Shimokuzawa, Chuo-ku, Sagamihara 252-5298, Japan
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Ueki Makoto
LSI Research Laboratory, Renesas Electronics Corporation, 1120 Shimokuzawa, Chuo-ku, Sagamihara 252-5298, Japan
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Kawahara Jun
LSI Research Laboratory, Renesas Electronics Corporation, 1120 Shimokuzawa, Chuo-ku, Sagamihara 252-5298, Japan
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Ikarashi Nobuyuki
LSI Research Laboratory, Renesas Electronics Corporation, 1120 Shimokuzawa, Chuo-ku, Sagamihara 252-5298, Japan
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Furutake Naoya
LSI Research Laboratory, Renesas Electronics Corporation, 1120 Shimokuzawa, Chuo-ku, Sagamihara 252-5298, Japan
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Saitoh Shinobu
LSI Research Laboratory, Renesas Electronics Corporation, 1120 Shimokuzawa, Chuo-ku, Sagamihara 252-5298, Japan
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Hayashi Yoshihiro
LSI Research Laboratory, Renesas Electronics Corporation, 1120 Shimokuzawa, Chuo-ku, Sagamihara 252-5298, Japan
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Hayashi Yoshihiro
LSI Fundamental Research Laboratory, NEC Electronics Corporation, 1120 Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
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Hayashi Yoshihiro
System Devices Research Laboratories, NEC Corporation, 1120 Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
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Hayashi Yoshihiro
System Devices Research Laboratories, NEC, 1120 Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
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Hayashi Yoshihiro
System Devices and Fundamental Research, NEC Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
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Hayashi Yoshihiro
Microelectronics Research Laboratories, NEC, 1120, Shimokuzawa, Sagamihara, Kanagawa 229, Japan
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