Leakage Current Reduction of Poly-Si Thin Film Transistors by Two-Step Annealing
スポンサーリンク
概要
- 論文の詳細を見る
Leakage currents of polysilicon TFT's (thin film transistors) were reduced signifcantly by a two-step annealing technique which utilized low-temperature crystallization of amorphous films and a reduction of trap states by a high-temperature process. Two-step annealing formed polysilicon films with larger grains and lower electron spin densities. Trap state densities obtained from TFT on-currents correlated strongly with the leakage currents of the TFT's.
- 社団法人応用物理学会の論文
- 1991-01-15
著者
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AOYAMA Takahiro
Daihen Co.
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Aoyama T
Hitachi Ltd. Ibaraki Jpn
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AOYAMA Takashi
Hitachi Research Laboratory, Hitachi Ltd.
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Mochizuki Yasunori
Institute Of Industrial Science University Of Tokyo
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Mochizuki Yasuhiro
Hitachi Research Laboratory Hitachi Ltd.
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Mochizuki Yasuhiro
Hitachi Research Labolatory Hitachi Ltd.
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Miyata K
Institute For Drug Discovery Research Yamanouchi Pharmaceutical Co.
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KAWACHI Genshiro
Hitachi Research Laboratory, Hitachi Ltd.
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Miyata K
Hitachi Research Laboratory Hitachi Ltd.
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Oikawa Saburo
Hitachi Research Laboratory, Hitachi, Ltd.
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Miyata Kenji
Hitachi Research Laboratory, Hitachi, Ltd.
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Kawachi G
Hitachi Ltd. Ibaraki Jpn
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Kawachi Genshiro
Hitachi Research Laboratory Hitachi Ltd.
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Oikawa Saburo
Hitachi Research Laboratory Hitachi Ltd.
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Miyata Kenji
Hitachi Ltd.
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Aoyama Takashi
Hitachi Research Laboratory Hitachi Ltd
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