Watch-Dog Circuit for Quality Guarantee with Subthreshold MOSFET Current(<Special Section>New System Paradigms for Integrated Electronics)
スポンサーリンク
概要
- 論文の詳細を見る
We propose an ultra low power watch-dog circuit with the use of MOSFETs operation under subthreshold characteristics. The circuit monitors the amount of the product degradation because the subthreshold current of MOSFET emulates the rate of the general chemical reaction. Its operation was verified with both SPICE simulation and the measurement of the prototype chip. The new circuit embedded in a tag attached to any product could dynamically monitor the degradation regardless of storage conditions.
- 社団法人電子情報通信学会の論文
- 2004-11-01
著者
-
Hirose Tetsuya
Department of Electrical and Electronics Engineering, Kobe University
-
TANIGUCHI Kenji
Department of Cancer Research, Fuji Gotemba Research Laboratories, Chugai and Pharmaceutical Co
-
Ido Toru
Department Of Electronics And Information Systems Graduate School Of Eng. Osaka University
-
Taniguchi Kenji
Department Of Electrical Electronic And Information Engineering Osaka University
-
Matsuoka T
Department Of Electrical Electronic And Information Engineering Osaka University
-
Matsuoka Toshimasa
Department Of Electronic Engineering Osaka University
-
Matsuoka T
Osaka Univ. Osaka Jpn
-
Matsuoka Toshimasa
The Graduate School Of Engineering Osaka University
-
YOSHIMURA Ryuji
Texas Instruments Japan Ltd.
-
IDO Toru
Texas Instruments Japan Ltd.
-
Hirose Tetsuya
Department Of Electrical And Electronics Engineering Kobe University
-
Taniguchi Kenji
The Division Of Electrical Electronic And Information Engineering Osaka University
-
Taniguchi K
Department Of Electronics And Information Systems Osaka University
-
Taniguchi K
Division Of Electrical Electronics And Information Engineering Graduate School Of Engineering Osaka
-
Ido Tatemi
Department Of Electronics And Information Systems Graduate School Of Eng. Osaka University
-
Hirose Tetsuya
Department Of Electrical Engineering Hokkaido University
-
Yoshimura R
Department Of Electronics And Information Systems Graduate School Of Eng. Osaka University
-
Taniguchi Kenji
Department Of Biotechnology Tottori University
-
Matsuoka Toshimasa
Department of Electrical, Electronic and Information Engineering, Osaka University
-
Hirose Tetsuya
Department of Electrical and Electronic Engineering, Graduate School of Engineering, Kobe University, 1-1 Rokkodai, Nada, Kobe 657-8501, Japan
関連論文
- An On-Chip PVT Compensation Technique with Current Monitoring Circuit for Low-Voltage CMOS Digital LSIs
- Effective Cancer Targeting Using an Anti-tumor Tissue Vascular Endotheliumm specific Monoclonal Antibody (TES-23)
- Atomic configuration of boron pile-up at the Si/SiO2 interface
- Influences of Point and Extended Defects on As Diffusion in Si(Structure and Mechanical and Thermal Properties of Condensed Matter)
- Process Variation Compensation Technique for 0.5-V Body-Input Comparator
- A Switched-Capacitor Programmable Gain Amplifier Using Dynamic Element Matching
- Process Variation Compensation Technique for Voltage-controlled Ring Oscillator
- Analytical Expression Based Design of a Low-Voltage FD-SOI CMOS Low-Noise Amplifier(Analog Circuit Techniques and Related Topics)
- Small-Signal and Noise Model of Fully Depleted Silicon-on-Insulator Metal-Oxide-Semiconductor Devices for Low-Noise Amplifier
- Accurate Small-Signal Modeling of FD-SOI MOSFETs(Advanced RF Technologies for Compact Wireless Equipment and Mobile Phones)
- A design of gain-boosted folded-cascode CMOS op-amp for SC circuits
- Wired CDMA Interface with Adaptivity for Interconnect Capacitances(Nonlinear Theory and its Applications)
- CMOS Front-End Circuits of Dual-Band GPS Receiver(RF, Analog Circuit and Device Technologies)
- Ultralow-Power Current Reference Circuit with Low Temperature Dependence(Building Block, Analog Circuit and Device Technologies)
- A CMOS IF Variable Gain Amplifier with Exponential Gain Control(Analog Circuit Techniques and Related Topics)
- High Speed and Noise Tolerant Parallel Bus Interface for VLSI Systems Using Multi Bit Code Division Multiple Access(New System Paradigms for Integrated Electronics)
- Watch-Dog Circuit for Quality Guarantee with Subthreshold MOSFET Current(New System Paradigms for Integrated Electronics)
- Watchdog Circuit for Product Degradation Monitor using Subthreshold MOS Current
- A New Analog Correlator Circuit for DS-CDMA Wireless Applications
- Dynamically Programmable Paralell Processor (DPPP) : A Novel Reconfigurable Architecture with Simple Program Interface(Special Issue on Function Integrated Information Systems)
- Error Analysis on Simultaneous Data Transfers in CDMA Wired Interface
- C-12-26 An Auto-sensitivity Control Circuit for DS-CDMA Receiver Circuit
- A Novel Dynamically Programmable Arithmetic Array(DPAA)Processor for Digital Signal Processing(Special Section of Selected Papers from the 13th Workshop on Circuits and Systems in Karuizawa)
- Influence of N_2O Oxynitridation on Interface Trap Generation in Surface-Channel p-Channel Metal Oxide Semiconductor Field Effect Transistors
- Influence of N_2O-Oxynitridation on Interface Trap Generation in Surface-Channel PMOSFETs
- Temperature Dependence of Electron Mobility in InGaAs/InAlAs Heterostructures
- Novel Method of Intrinsic Characteristic Extraction in Lightly Doped Drain Metal Oxide Semiconductor Field Effect Transistors for Accurate Device Modeling
- Display Wall Empowered Visual Mining for CEOP Data Archive(Coordinated Enhanced Observing Period(CEOP))
- Initial CEOP-based Review of the Prediction Skill of Operational General Circulation Models and Land Surface Models(Coordinated Enhanced Observing Period(CEOP))
- Studies of Boron Segregation to {311} Defects in Silicon-Implanted Silicon
- Boron Segregation to {311} Defects Induced by Self-Implantation Damage in Si
- Boron Accumulation in the {311} Defect Region Induced by Self-Implantation into Silicon Substrate
- Impact Excitation of Carriers in Diamond under Extremely High Electric Fields
- Hole Trapping and Detrappirug Characteristics Investigated by Substrate Hot-Hole Injection into Oxide of Metal-Oxide-Semiconduetor Structure
- Hot-Hole-Induced Interface State Generation in p-Channel MOSFETs with Thin Gate Oxide
- Evaluation of Spatial Distribution of Hole Traps Using Depleted Gate MOSFETs
- Analytical Device Model of SOI MOSFETs Including Self-Heating Effect
- Spatial Distribution of Trapped Holes in the Oxide of Metal Oxide Semiconductor Field-Effect Transistors after Uniform Hot-Hole Injection
- Existence of Double-Charged Oxide Traps in Submicron MOSFET's (SOLID STATE DEVICES AND MATERIALS 1)
- Interface State Generation Mechanism in MOSFET's during Substrate Hot-Electron Injection : Special Section : Solid State Devices and Materials 2 : Silicon Devices and Process Technologies
- Hot Electron Drift Velocity in AlGaAs/GaAs Heterojunctions : Electrical Properties of Condensed Matter
- Monte Carlo Study of Hot Electron Transport in Quantum Wells : Electrical Properties of Condensed Matter
- An On-Chip PVT Compensation Technique with Current Monitoring Circuit for Low-Voltage CMOS Digital LSIs
- Role of Boron Atoms on Fluorine Diffusion under Various Stages of Annealing
- Boron Emission Rate from Si/SiO_2 Interface Traps to Bulk Silicon for Dose Loss Modeling
- Dependence of Gate Leakage Current on Location of Soft Breakdown Spot in Metal-Oxide-Semiconductor Field-Effect Transistor
- Effect of Oxide Breakdown on Complementary Metal Oxide Semiconductor Circuit Operation and Reliability
- A Study of Pre-Breakdown in Ultra-Thin Silicon Dioxide Films Using Carrier Separation Measurement
- Trap Density Dependent Inelastic Tunneling in Stress-Induced Leakage Current
- Trap Density Dependent Inelastic Tunneling in Stress-Induced Leakage Current
- Ensemble Monte Carlo/Molecular Dynamics Simulation of Inversion Layer Mobility in Si MOSFETs : Effects of Substrate Impurity(the IEEE International Coference on SISPAD '02)
- New Nondestructive Carrier Profiling for Ion Implanted Si Using Infrared Spectroscopic Ellipsometry
- Crossover of Direct and Indirect Transitions in (GaAs)_m/(AlAs)_5 Superlattices (m=1-11)
- Photoreflectance and Photoluminescence Study of (GaAs)_m/(AlAs)_5 (m=3-11)Superlattices: Direct and Indirect Transition
- Two-Dimensional Simulation of Quantum Tunneling across Barrier with Surface Roughness
- Prenatal underdevelopment and schizophrenia : A case report of monozygotic twins
- Season of birth of schizophrenics in a recent Japanese sample
- Design of a 0.5V Op-Amp Based on CMOS Inverter Using Floating Voltage Sources
- Low-Voltage Process-Compensated VCO with On-Chip Process Monitoring and Body-Biasing Circuit Techniques
- A Highly Sensitive Thermosensing CMOS Circuit Based on Self-Biasing Circuit Technique
- Threshold-Logic Devices Consisting of Subthreshold CMOS Circuits
- CMOS Voltage Reference Based on the Threshold Voltage of a MOSFET
- A CMOS Watchdog Sensor for Certifying the Quality of Various Perishables with a Wider Activation Energy(Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
- Temperature Dependence of Electron Mobility in Si Inversion Layers
- Low-Voltage Wireless Analog CMOS Circuits toward 0.5V Operation
- Application of Noise-Enhanced Detection of Subthreshold Signals for Communication Systems
- A Low Power 622MHz CMOS Phase-Locked Loop with Source Coupled VCO and Dynamic PFD (Special Section of Papers Selected from ITC-CSCC'96)
- Identification of Functionally Important Amino Acid Residues in Zymomonas mobilis Levansucrase
- MQW Electroabsorption Optical Gates for WDM Switching Systems(Special Issue on High-Capacity WDM/TDM Networks)
- A New Inductance Extraction Technique of On-Wafer Spiral Inductor Based on Analytical Interconnect Formula(Microelectronic Test Structures)
- A Low-Voltage SOI-CMOS LC-Tank VCO with Double-Tuning Technique Using Lateral P-N Junction Variable Capacitance(Special lssue on Silicon RF Device & Integrated Circuit Technologies)
- Novel Method of Modulation Spectroscopy for Heterostructures: Electro-Photoreflectance
- Electroreflectance Study of Cd_xHg_Te
- Optical Constants of HgTe and HgSe
- Electroreflectance Measurements on Cd_xHg_Te
- A-3-1 A 5Msample/s 0.965-mW Switched-Capacitor Filter in 0.6-μm CMOS Technology
- High-Sensitivity SOI MOS Photodetector with Self-Amplification
- High Sensitivity Photodetector with Self-Amplification Capability
- A Transformer Noise-Canceling Ultra-Wideband CMOS Low-Noise Amplifier
- A 0.5V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier
- A Low Power Analog Matched-Filter with Smart Sliding Correlation
- Study of a Length Coefficient for an Extended Drift-Diffusion Model for Metal-Oxide-Semiconductor (MOS) Device Simulation
- Impact Ionization Model Using Average Energy and Average Square Energy of Distribution Function
- Novel Impact Ionization Model for Device Simulation Using Generalized Moment Conservation Equations
- A-5-3 Speed-Power-Resolution Tradeoff in Analog Correlator Circuit
- Direct Observation of Gaussian-Type Energy Distribution for Hot Electrons in Silicon
- Strain Evaluation at Si/Si0_2 Interface Using the Electroreflectance Method
- Temperature Dependence of k_BTC Noise in "Coulomb Blockade" Regime
- Theoretical Study of Minority Carrier Lifetimes due to Auger Recombination in n-type Silicon
- A Short Channel HEMT Model for Circuit Simulation Based on Physical Structure
- Quantification of Electrical Deactivation by Triply Negative Charged Ga Vacancies in Highly Doped Thin GaAs Layers
- Increasing Atmospheric Temperature in the Upper Troposphere and Cumulus Convection over the Eastern Part of the Tibetan Plateau in the Pre-Monsoon Season of 2004(Coordinated Enhanced Observing Period(CEOP))
- Application of Kelvin Technique in A Gas-Sensor Read-Out Circuit
- A Switched-Capacitor Programmable Gain Amplifier Using Dynamic Element Matching
- Asymmetric Single Electron Turnstile and Its Electronic Circuit Applications (Special Issue on Technology Challenges for Single Electron Devices)
- Physical Models for Deep Submicron Device Simulation
- Floating Voltage Reference Generator for A/D Converters
- Magnetophonon Resonance at High Electric and Magnetic Fields in Small n^+nn^+ GaAs Structures
- A Self-Consistent Monte Carlo Simulation for Two-Dimensional Electron Transport in MOS Inversion Layer
- Fine structures in Optical Absorption Spectra of MnO