Process Variation Compensation Technique for 0.5-V Body-Input Comparator
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概要
- 論文の詳細を見る
This work presents a compensation method for low-voltage body-input comparator to alleviate performance degradation due to process variations. The designed body-input comparator using the proposed compensation method is designed in a standard 0.18μm CMOS process with a 0.5V supply. The simulation results show that it keeps high resolution at various simulation corners, and that the output common-mode voltage maintains around V_<DD>/2.
- 社団法人電子情報通信学会の論文
- 2009-12-07
著者
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TANIGUCHI Kenji
Department of Cancer Research, Fuji Gotemba Research Laboratories, Chugai and Pharmaceutical Co
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Wang Jun
Department Of Electrical Electronic And Information Engineering Osaka University
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Matsuoka T
Department Of Electrical Electronic And Information Engineering Osaka University
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Matsuoka Toshimasa
Department Of Electronic Engineering Osaka University
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Matsuoka Toshimasa
The Graduate School Of Engineering Osaka University
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Taniguchi K
Department Of Electronics And Information Systems Osaka University
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Taniguchi K
Division Of Electrical Electronics And Information Engineering Graduate School Of Engineering Osaka
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Taniguchi Kenji
Department Of Biotechnology Tottori University
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Wang Jun
Department Of Automation And Computer-aided Engineering The Chinese University Of Hong Kong
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Matsuoka Toshimasa
Department of Electrical, Electronic and Information Engineering, Osaka University
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TANIGUCHI Kenji
Department of Electrical, Electronic and Information Engineering, Osaka University
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