Enhanced Performance of Gate-First p-Channel Metal–Insulator–Semiconductor Field-Effect Transistors with Polycrystalline Silicon/TiN/HfSiON Stacks Fabricated by Physical Vapor Deposition Based In situ Method

概要

論文の詳細を見る
We demonstrated the use of an in situ metal/high-k fabrication method for improving the performance of metal–insulator–semiconductor field-effect transistors (MISFETs). Gate-first pMISFETs with polycrystalline silicon (poly-Si)/TiN/HfSiON stacks were fabricated by techniques based on low-damage physical vapor deposition, in which high-quality HfSiON dielectrics were formed by the interface reaction between an ultrathin metal-Hf layer (0.5 nm thick) and a SiO2 underlayer, and TiN electrodes were continuously deposited on the gate dielectrics without exposure to air. Gate-first pMISFETs with high carrier mobility and a low threshold voltage ($V_{\text{th}}$) were realized by reducing the carbon impurity in the gate stacks and improving the $V_{\text{th}}$ stability against thermal treatment. As a result, we obtained superior current drivability ($I_{\text{on}} = 350$ μA/μm at $I_{\text{off}} = 200$ pA/μm), which corresponds to a 13% improvement over that of conventional chemical vapor deposition-based metal/high-k devices.
2007-12-25