$V_{\text{ox}}/E_{\text{ox}}$-Driven Breakdown of Ultrathin SiON Gate Dielectrics in p-Type Metal Oxide Semiconductor Field Effect Transistors under Low-Voltage Inversion Stress

スポンサーリンク

概要

• 論文の詳細を見る

• The breakdown mechanism of ultrathin SiON gate dielectrics in p-type metal oxide semiconductor field effect transistors having p+gates (p+gate-pMOSFETs) has been studied. Systematic study with varying gate doping concentrations has revealed that, in the case of p+gate-pMOSFET in inversion mode, gate dielectric breakdown under stress voltage lower than $-4$ V is driven by oxide voltage ($V_{\text{ox}}$) or oxide field ($E_{\text{ox}}$), while the breakdown under stress voltage higher than $-4$ V is driven by gate voltage ($V_{\text{g}}$). The $V_{\text{ox}}/E_{\text{ox}}$-driven breakdown observed under low stress voltage is quite important to the reliability of low-voltage complementary metal oxide semiconductor (CMOS). By studying the mechanism of the breakdown, it has been clarified that the breakdown is not induced by electron current. The concept that the breakdown is due to same mechanism as the negative bias temperature instability (NBTI), namely the interfacial hydrogen release driven by $E_{\text{ox}}$, has been shown to be possible. However, direct tunneling of holes driven by $V_{\text{ox}}$ has also been found to be a possible driving force of the breakdown. Although a decisive conclusion concerning the mechanism issue has not yet been obtained, the key factor that governs the breakdown has been shown to be $V_{\text{ox}}$ or $E_{\text{ox}}$.

• 2007-01-15

著者

• Umeda Hiroshi

  Renesas Technology Corp.

• Yugami Jiro

  Renesas Technology Corp.

• TSUJIKAWA Shimpei

  Renesas Technology Corp.

• SHIGA Katsuya

  Renesas Technology Corp.

• Tsujikawa Shimpei

  Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan

関連論文

• V_/E_-Driven Breakdown of Ultrathin SiON Gate Dielectrics in p-Type Metal Oxide Semiconductor Field Effect Transistors under Low-Voltage Inversion Stress
• Suppression of Boron Penetration from Source/Drain-Extension to Improve Gate Leakage Characteristics and Gate-Oxide Reliability for 65-nm Node CMOS and Beyond
• $V_{\text{ox}}/E_{\text{ox}}$-Driven Breakdown of Ultrathin SiON Gate Dielectrics in p-Type Metal Oxide Semiconductor Field Effect Transistors under Low-Voltage Inversion Stress
• Enhanced Performance of Gate-First p-Channel Metal–Insulator–Semiconductor Field-Effect Transistors with Polycrystalline Silicon/TiN/HfSiON Stacks Fabricated by Physical Vapor Deposition Based In situ Method
• Phase and Composition Control of Ni Fully Silicided Gates by Nitrogen Ion Implantation and Double Ni Silicidation

スポンサーリンク