Low Threshold Voltage and High Mobility N-Channel Metal–Oxide–Semiconductor Field-Effect Transistor Using Hf–Si/HfO2 Gate Stack Fabricated by Gate-Last Process
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概要
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Systematic characterization of Hf–Si/HfO2 gate stacks revealed two mobility degradation modes. One is carrier scattering by fixed charges and/or trapped charges induced by the crystallization in the thick HfO2 case (inversion oxide thickness, $T_{\text{inv}}> 1.6$ nm). The other is the Hf penetration into the interfacial layer with the Si substrate in the thin HfO2 case ($T_{\text{inv}}< 1.6$ nm) for the Hf-rich electrode. It was demonstrated that careful optimization of the HfO2 thickness and the Hf–Si composition can suppress both modes. As a result, a high electron mobility equivalent to that of n+polycrystalline silicon (poly-Si)/SiO2 (248 cm2 V-1 s-1 at $E_{\text{eff}}=1$ MV/cm) was obtained at $T_{\text{inv}}$ of 1.47 nm. Moreover, the effective work function of the optimized Hf–Si/HfO2 gate stack is located within 50 mV from the Si band edge ($E_{\text{c}}$). An extremely high $I_{\text{on}}$ of 1165 μA/μm (at $I_{\text{off}} = 81$ nA/μm) at $V_{\text{dd}}=1.0$ V was demonstrated for a 45 nm gate n-channel metal–oxide–semiconductor field-effect transistor (n-MOSFET) without strain enhanced technology.
- 2010-01-25
著者
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Kadomura Shingo
Semiconductor Technology Development Division Semiconductor Business Group Sony Corporation
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Watanabe Heiji
Department Of Material And Life Science Graduate School Of Engineering Osaka University
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Iwamoto Hayato
Semiconductor Technology Development Division Semiconductor Business Group Sony Corporation
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Hirano Tomoyuki
Semiconductor Technology Development Division Semiconductor Business Group Sony Corporation
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Tai Kaori
Semiconductor Technology Development Division Semiconductor Business Group Sony Corporation
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Yamaguchi Shinpei
Semiconductor Technology Development Division Semiconductor Business Group Sony Corporation
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Ando Takashi
Department Of Applied Biological Chemistry Graduate School Of Agricultural And Life Sciences Univers
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Yoshida Shinichi
Semiconductor Technology Development Division Semiconductor Business Group Sony Corporation
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Kadomura Shingo
Semiconductor Technology Development Division, Consumer Products and Device Group, Sony Corporation, 4-14-1 Asahi-cho, Atsugi, Kanagawa 243-0014, Japan
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Ando Takashi
Department of Material and Life Science, Graduate School of Engineering, Osaka University, 2-1 Yamadaoka, Suita, Osaka 565-0871, Japan
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Hirano Tomoyuki
Semiconductor Technology Development Division, Consumer Products and Device Group, Sony Corporation, 4-14-1 Asahi-cho, Atsugi, Kanagawa 243-0014, Japan
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Watanabe Heiji
Department of Material and Life Science, Graduate School of Engineering, Osaka University, 2-1 Yamadaoka, Suita, Osaka 565-0871, Japan
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Yamaguchi Shinpei
Semiconductor Technology Development Division, Consumer Products and Device Group, Sony Corporation, 4-14-1 Asahi-cho, Atsugi, Kanagawa 243-0014, Japan
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Iwamoto Hayato
Semiconductor Technology Development Division, Consumer Products and Device Group, Sony Corporation, 4-14-1 Asahi-cho, Atsugi, Kanagawa 243-0014, Japan
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Yoshida Shinichi
Semiconductor Technology Development Division, Consumer Products and Device Group, Sony Corporation, 4-14-1 Asahi-cho, Atsugi, Kanagawa 243-0014, Japan
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Tai Kaori
Semiconductor Technology Development Division, Consumer Products and Device Group, Sony Corporation, 4-14-1 Asahi-cho, Atsugi, Kanagawa 243-0014, Japan
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