A Test Plan Grouping Method to Shorten Test Length for RTL Data Paths under a Test Controller Area Constraint(Test)(<Special Issue>Dependable Computing)
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概要
- 論文の詳細を見る
This paper proposes a test generation method using several partly compacted test plan tables for RTL data paths. Combinational modules in data paths are tested using several partly compacted test plan tables. Each partly compacted test plan table is generated from each grouped test plan set and is used to test combinational modules corresponding to the grouped test plans. The values of control signals in a partly compacted test plan table are supplied by a test controller. This paper also proposes the architecture of a test controller which can be synthesized in a reasonable amount of time, and proposes a test plan grouping method to shorten test length for data paths under a test controller area constraint. Experimental results for benchmarks show that the test lengths are shortened by 4 to 36% with -9 to 8% additional test controller area compared with the test generation method using test plans.
- 社団法人電子情報通信学会の論文
- 2003-12-01
著者
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Fujiwara Hideo
Graduate School Of Information Science Nara Institute Of Science And Technology
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Fujiwara Hideo
The Authors Are With The Graduate School Of Information Science Nara Institute Of Science And Techno
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Date Hiroshi
Starc
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Fujiwara Hideo
Naist
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Fujiwara Hideo
Graduate School Of Infromation Science Nara Institute Of Science And Technology (naist)
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Fujiwara Hideo
Nara Institute Of Science And Technology
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MURAOKA Michiaki
STARC
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HOSOKAWA Toshinori
College of Industrial Technology, Nihon University
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DATE Hiroshi
System JD Co., Ltd.
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MIYAZAKI Masahide
Design Technology Development Department, Semiconductor Technology Academic Research Center (STARC)
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MURAOKA Michiaki
Design Technology Development Department, Semiconductor Technology Academic Research Center (STARC)
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Fujiwara Hideo
Graduate School Of Information Of Science Nara Institute Of Science And Technology
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Fujiwara H
Nara Inst. Sci. And Technol. Kansai Science City Jpn
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Hosokawa T
Starc
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Hosokawa Toshinori
College Of Industrial Technology Nihon University
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Muraoka M
Starc (semiconductor Technol. Academic Res. Center) Yokohama‐shi Jpn
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Miyazaki Masahide
Design Technology Development Department Semiconductor Technology Academic Research Center (starc)
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