Testing for the Programming Circuit of SRAM-Based FPGAs

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概要

• 論文の詳細を見る

• he programming circuit of SRAM-based FPGAs consists of two shift registers, a control circuit and a configuration memory (SRAM) cell array. Because the configuration memory cell array can be easily tested by conventional test methods for RAMs, we focus on testing for the shift registers. We first derive test procedures for the shift registers, which can be done by using only the faculties of the programming circuit, without using additional hardware. Next, we show the validness of the test procedures. Finally, we show an application of the test procedures to test Xilinx XC4025.

• 社団法人電子情報通信学会の論文
• 1999-06-25

著者

• INOUE Tomoo

  Hiroshima City University

• Inoue T

  Hiroshima City Univ. Hiroshima‐shi Jpn

• MICHINISHI Hiroyuki

  the Faculty of Engineering, Okayama University of Science

• YOKOHIRA Tokumi

  the Faculty of Engineering, Okayama University

• OKAMOTO Takuji

  the Faculty of Engineering, Okayama University

• INOUE Tomoo

  the Graduate School of Information Science, Nara Institute of Science and Technology

• FUJIWARA Hideo

  the Graduate School of Information Science, Nara Institute of Science and Technology

• Fujiwara Hideo

  Naist

• Fujiwara Hideo

  Nara Institute Of Science And Technology

• Inoue Tomoo

  The Graduate School Of Information Science Nara Institute Of Science And Technology

• Fujiwara Hideo

  The Graduate School Of Information Science Nara Institute Of Science And Technology

• Okamoto T

  Faculty Of Engineering Okayama University Of Science

• Yokohira Tokumi

  Faculty Of Engineering Okayama University

• Michinishi Hiroyuki

  Faculty Of Engineering Okayama University Of Science

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