Analysis of Test Generation Complexity for Stuck-At and Path Delay Faults Based on τ^k-Notation(Complexity Theory)

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概要

• 論文の詳細を見る

• In this paper, we discuss the relationship between the test generation complexity for path delay faults (PDFs) and that for stuck-at faults (SAFs) in combinational and sequential circuits using the recently introduced τ^k-notation. On the other hand, we also introduce a class of cyclic sequential circuits that are easily testable, namely two-column distributive state-shiftable finite state machine realizations (2CD-SSFSM). Then, we discuss the relevant conjectures and unsolved problems related to the test generation for sequential circuits with PDFs under different clock schemes and test generation models.

• 社団法人電子情報通信学会の論文
• 2007-08-01

著者

• FUJIWARA Hideo

  Nara Institute of Science and Technology (NAIST)

• Ooi Chia

  Universiti Teknologi Malaysia

• Fujiwara Hideo

  Computer Design And Test Lab Nara Institute Of Science And Technology

• Fujiwara Hideo

  Nara Institute Of Science And Technology:japan Science And Technology Agency Crest

• Fujiwara Hideo

  Nara Institute Of Science And Technology

• CLOUQUEUR Thomas

  AMD Corporation

• Fujiwara Hideo

  Nara Inst. Sci. And Technol. (naist) Ikoma‐shi Jpn

• Fujiwara Hideo

  Nara Inst. Of Sci. And Technol. (naist) Ikoma‐shi Jpn

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