A secure scan design approach using extended de Bruijn graph (ディペンダブルコンピューティング)
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概要
- 論文の詳細を見る
Scan design makes digital circuits easily testable, however, it can also be exploited to be used for hacking the chip. This paper introduces a new secure scan design approach using extended de Bruijn graph, which aims to satisfy both testability and security of digital circuits. The approach is only to replace the original scan chains to modified scan registers called extended scan registers. This method requires very little area overhead and no performance overhead. Moreover, no additional keys and controller circuits outside of the scan chain are needed, thus making the scheme low-cost and efficient.
- 社団法人電子情報通信学会の論文
- 2009-02-09
著者
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Obien Marie
Graduate School Of Information Science Nara Institute Of Science And Technology
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Fujiwara Hideo
Graduate School Of Information Of Science Nara Institute Of Science And Technology
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Fujiwara Hideo
Nara Inst. Sci. And Technol. Nara Jpn
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