Cho Heung-jae | Memory R&d Division Hynix Semiconductor Inc.

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著作論文

Suppressed Boron Penetration in p^+ poly-Si/Al_2O_3/Si Metal-Oxide-Semiconductor System by Remote Plasma Nitridation of Al_2O_3 Surface
Characteristics of TaO_xN_y Gate Dielectric with Improved Thermal Stability
Physical and Electrical Characteristics of Poly-Si/ZrO_2/SiO_2/Si MOS Structures
Characteristics of Multiple Thickness Gate Oxides Using Oxidation Enhancement by Si Implantation
Deposition Characteristics of (Ba, Sr)TiO_3 Thin Films by Liquid Source Metal-Organic Chemical Vapor Deposition at Low Substrate Temperatures
Variation of Electrical Conduction Phenomena of Pt/(Ba, Sr)TiO_3/Pt Capacitors by Different Top Electrode Formation Processes
A Process Integration of (Ba, Sr) TiO_3 Capacitor into 256M DRAM
Diffusion Barrier Characteristics of TiSix/TiN for Tungsten Dual Poly Gate in DRAM
Degradation of Nitride/W/WN_x/Poly-Si Gate Stack by Post-Thermal Processes
Effect of Post Thermal Processes on Nitride/W/WN_x/poly-Si Gate Stack
Impact of In Situ NH_3 Preannealing on Sub-100nm Tungsten Polymetal Gate Electrode during the Sealing Nitride Formation
Effect of Selective Oxidation Conditions on Defect Generation in Gate Oxide
Effect of Gate Oxide Thickness Uniformity on the Characteristics of Three-dimensional Transistors
TaO_xN_y Gate Dielectric with Improved Thermal Stability
Effects of Encapsulating Barrier Layer on Ferroelectric Properties of Ir/IrO_2/PZT/Pt/IrO_2 Capacitor
Preparation and Electrical Properties of SrTiO3 Thin Films Deposited by Liquid Source Metal-Organic Chemical Vapor Deposition (MOCVD)
Deposition and Electrical Characterization of Very Thin SrTiO_3 Films for Ultra Large Scale Integrated Dynamic Random Access Memory Application
Electrical Characterizations of Pt/(Ba,Sr)TiO_3/Pt Planar Capacitors for ULSI DRAM Applications
Structural and Electrical Properties of Ba_Sr_TiO_3 Films on Ir and IrO_2 Electrodes
Preparation and Characterization of Iridium Oxide Thin Films Grown by DC Reactive Sputtering
Gate Oxide Reliability Characterization of Tungsten Polymetal Gate with Low-Contact-Resistive WSix/WN Diffusion Barrier in Memory Devices
Roles of Ti, TiN, and WN as an Interdiffusion Barrier for Tungsten Dual Polygate Stack in Memory Devices
Effect of Selective Oxidation Conditions on Defect Generation in Gate Oxide
Impact of In Situ NH3 Preannealing on Sub-100 nm Tungsten Polymetal Gate Electrode during the Sealing Nitride Formation
Characteristics of Multiple Thickness Gate Oxides Using Oxidation Enhancement by Si Implantation

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