Complementary Self-Biased Logics Based on Single-Electron Transistor (SET)/CMOS Hybrid Process

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概要

• 論文の詳細を見る
• Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
• 2005-04-30

著者

• KIM Kyung

  School of Mechanical Engineering, Pusan National University

• Kim K

  Seoul National Univ. Seoul Kor

• Park Byung-gook

  School Of Electrical Engineering Seoul National University

• LEE Yong

  School of Electrical Engineering, Seoul National University

• LEE Jong

  School of Electrical Engineering, Seoul National University

• Lee Y

  Inter-university Semiconductor Research Center And School Of Electrical Engineering Seoul National U

• Sim Jae

  School Of Electrical Engineering & Inter-university Semiconductor Research Center (isrc) Seoul N

• Song Ki-whan

  Inter-university Semiconductor Research Center School Of Electrical Engineering Seoul National Unive

• SONG Ki-Whan

  School of Electrical Engineering, Seoul National University

• YOU Young

  R&D Center, Samsung Electronics Co.

• PARK Joo-On

  R&D Center, Samsung Electronics Co.

• JIN You

  R&D Center, Samsung Electronics Co.

• KIM Young-Wug

  R&D Center, Samsung Electronics Co.

• Kim Young-wug

  R&d Center Samsung Electronics Co.

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