Impact of Reducing Shallow Trench Isolation Mechanical Stress on Active Length for 40 nm n-Type Metal--Oxide--Semiconductor Field-Effect Transistors

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概要

• 論文の詳細を見る

• We report an improved densification annealing process for sub atmospheric chemical vapor deposition (SACVD)-based shallow trench isolation (STI) to enhance n-type metal--oxide--semiconductor field-effect transistor (nMOSFET) performance for 40 nm node and beyond. Experimental results show that this improved STI densification process leads to lower compressive stress in the small active area compared with the standard STI process. This is beneficial to electron mobility and leads to an enhancement of on-current ($I_{\text{ON}}$). Moreover, comparable drain induced barrier lowering (DIBL) and subthreshold swing (SS) characteristics for both devices indicate that the improved densification process would no significant influences on process variations or dopant diffusions. Hence, the improved STI process can be adopted in 40 nm complementary metal--oxide--semiconductor (CMOS) technology and beyond.

• 2011-04-25

著者

• Wu San-lein

  Department Of Electronic Engineering Cheng Shiu University

• Chang Shoou-jinn

  Institute Of Electro-optical Science And Engineering Center For Micro/nano Science And Technology Na

• Cheng Osbert

  United Microelectronics Corp. (umc) Crd Logic Division

• Huang Cheng-tung

  United Microelectronics Corp. Specialty Technology Department Technogoly & Process Development D

• Lin Hau-Yu

  Institute of Microelectronics and Department of Electrical Engineering, Center for Micro/Nano Science and Technology, Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan 70101, Taiwan

• Kuo Cheng-Wen

  Institute of Microelectronics and Department of Electrical Engineering, Center for Micro/Nano Science and Technology, Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan 70101, Taiwan

• Wu Chung-Yi

  Institute of Microelectronics and Department of Electrical Engineering, Center for Micro/Nano Science and Technology, Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan 70101, Taiwan

• Huang Yao-Tsung

  Institute of Microelectronics and Department of Electrical Engineering, Center for Micro/Nano Science and Technology, Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan 70101, Taiwan

• Hong De-Gong

  Department of Electronic Engineering, Cheng Shiu University, Niaosong, Kaohsiung 833, Taiwan, R.O.C.

• Hong De-Gong

  Department of Electronic Engineering, Cheng Shiu University, Niaosong, Kaohsiung 833, Taiwan

• Huang Cheng-Tung

  United Microelectronics Corp. (UMC), CRD Logic Division, No. 18, Nanke 2nd Rd., Tainan Science Park, Sinshih Township, Tainan County 741, Taiwan 12457, R.O.C.

• Chang Shoou-Jinn

  Institute of Microelectronics and Department of Electrical Engineering, Center for Micro/Nano Science and Technology, Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan 70101, Taiwan

• Huang Cheng-Tung

  United Microelectronics Corporation, Ltd., Tainan Science-Based Industrial Park, Tainan 74145, Taiwan

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