Analytical Estimation of Path-Delay Variation for Multi-Threshold CMOS Circuits
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概要
- 論文の詳細を見る
- 2009-04-01
著者
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Masu Kazuya
Integrated Research Institute
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Tanoi Satoru
東工大
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Masu Kazuya
東工大
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HAGIWARA Shiho
Integrated Research Institute, Tokyo Institute of Technology
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SATO Takashi
Integrated Research Institute, Tokyo Institute of Technology
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SATO Takashi
Graduate School of Informatics, Kyoto University
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Hagiwara Shiho
Integrated Research Institute Tokyo Institute Of Technology
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Sato Takashi
Graduate School Of Informatics Kyoto University
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Masu Kazuya
Solutions Research Laboratory Tokyo Institute Of Technology
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