Fractionally Injection-Locked Frequency Multiplication Technique with Multi-Phase Ring Voltage-Controlled Oscillator
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概要
- 論文の詳細を見る
In this paper, we present a fractionally injection-locked frequency multiplication technique that can solve the tradeoff between the selectable frequency step and phase noise of injection-locked frequency multipliers (ILFMs). For a given output frequency step, the phase noise of the proposed ILFM is lower than that of conventional ILFMs because higher-frequency signals can be injected. The proposed ILFM was fabricated using a 180 nm Si complementary metal oxide semiconductor (CMOS) process. 1/2-, 1/3-, 1/4-, and 1/6-integral frequency multiplications were realized, which means that the output frequency resolution is 6 times as high as that of conventional ILFM. When the reference frequency was 100 MHz, the measured phase noise at 725 (= 100\times 29/4) MHz was -120 dBc/Hz at a 1 MHz offset, and that at 767 (= 100\times 23/3) MHz was -119 dBc/Hz at 1 MHz offset.
- 2013-04-25
著者
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Masu Kazuya
Solutions Research Laboratory Tokyo Institute Of Technology
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Ishihara Noboru
Solutions Research Laboratory Tokyo Institute Of Technology
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Ito Hiroyuki
Solutions Research Laboratory, Tokyo Institute of Technology
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Lee Sang-Yeop
Solutions Research Laboratory, Tokyo Institute of Technology, Yokohama 226-8503, Japan
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Kamimura Tatsuya
Solutions Research Laboratory, Tokyo Institute of Technology, Yokohama 226-8503, Japan
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Ikeda Sho
Solutions Research Laboratory, Tokyo Institute of Technology, Yokohama 226-8503, Japan
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