Masu Kazuya | 東工大

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概要

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著作論文

Lower Boundary of Supply Voltage in Digital ULSI Based on the Communication Theory
Low Power Current-Cut Switched-Current Matched Filter for CDMA (Special Issue on Low-Power High-Performance VLSI Processors and Technologies)
Novel Low-Power Switched-Current Matched Filter for Direct-Sequence Code-Division-Multiple-Access Wireless Communication
Full-Duplex Asynchronous Spread Spectrum Modem Using a SAW Convolver for 2.4-GHz Wireless LAN (Special Issue on Personal, Indoor and Mobile Radio Communications)
A Universal Equivalent Circuit Model for Ceramic Capacitors
Layout-Aware Compact Model of MOSFET Characteristics Variations Induced by STI Stress
C-12-43 CMOS Power Amplifier in 65nm Technology
C-12-37 CMOS Inverter-based Wideband LNA in 65nm Technology
An Evaluation Method of the Number of Monte Carlo STA Trials for Statistical Path Delay Analysis
Analytical Estimation of Path-Delay Variation for Multi-Threshold CMOS Circuits
2-Port Modeling Technique for Surface-Mount Passive Components Using Partial Inductance Concept
A Time-Slicing Ring Oscillator for Capturing Time-Dependent Delay Degradation and Power Supply Voltage Fluctuation
One-Shot Voltage-Measurement Circuit Utilizing Process Variation
Application of Correlation-Based Regression Analysis for Improvement of Power Distribution Network
A High-Efficiency CMOS Class-B Push-Pull Power Amplifier for Code-Division-Multiple-Access Cellular System
Aluminum Chemical Vapor Deposition Technology for High Deposition Rate and Surface Morphology Improvement
Crystallographic Structures and Parasitic Resistances of Self-Aligned Silicide TiSi_2/Self-Aligned Nitrided Barrier Layer/Selective Chemical Vapor Deposited Aluminum in Fully Self-Aligned Metallization Metal Oxide Semiconductor Field-Effect Transistor
Self-Aligned 10-nm Barrier Layer Formation Technology for Fully Self-Aligned Metallization Metal-Oxide-Semiconductor Field-Effect-Transistor
Self-Aligned 10-nm Barrier Layer Formation Technology for Fully Self-Aligned Metallization MOSFET
Tunable CMOS LNA Using a Variable Inductor for a Reconfigurable RF Circuit
A 0.49-6.50GHz Wideband LC-VCO with High-IRR in a 180nm CMOS Technology
Novel Low-Power Switched Current Matched Filter for DS-CDMA Wireless Communication
In-Situ Counting of Process-Induced Particles
Particle Counting in Semiconductor Processing Gas and Apparatus with a New Flow-Cell-Type Laser Particle Counter
Single Crystallization of Aluminum on SiO_2 by Thermnal Annealing and Observation with Scanning μ-RHEED Microscope
High-Rate Deposition of High-Quality Silicon Nitride Film at Room Temperature by Quasi-Remote Plasma Chemical Vapor Deposition
A Large Variable Ratio On-Chip Inductor with Spider Legs Shield
Wide Tuning Range LC-VCO Using Variable Inductor for Reconfigurable RF Circuit(Analog Circuit Techniques and Related Topics)
Small Area Snake Inductor on Si RF CMOS Chip
On-chip Spiral Inductors Integrated with Wafer-Level Package
In Situ Observation of Electromigration in Cu Film Using Scanning μ-Reflection High-Energy Electron Diffraction Microscope
C-12-23 A Study of Inverter-based RF CMOS Low Noise Amplifier Scalability in CMOS Process
C-2-82 Broadside 3-dB Tandem Coupler Using WLP Technology for 60 GHz Applications
Low-Loss Distributed Constant Passive Devices Using Wafer-Level Chip Scale Package Technology(Microwaves, Millimeter-Waves)
On-Chip Yagi Antenna for Wireless Signal Transmission in Stacked MCP
Zero-Crosstalk Bus Line Structure for Global Interconnects in Si Ultra Large Scale Integration
RF Passive Components Using Metal Line on Si CMOS(Analog Circuit and Device Technologies)
Zero-Crosstalk Bus Line Structure for Global Interconnects in Si ULSI
High-Speed Transmission Circuit for Micro Network on Si ULSI
Twisted Differential Transmission Line Structure for EMI Noise Reduction at Global Interconnect in Si LSI
High Density Differential Transmission Line Structure on Si ULSI(Analog Circuit and Device Technologies)
Equivalent Circuit Model for On-Chip Variable Inductor
Linear Time Calculation of On-Chip Power Distribution Network Capacitance Considering State-Dependence
RF CMOS Integrated Circuit : History, Current Status and Future Prospects
Matched Filter Type SET Circuit for Room Temperature Operation
Reliability of Single Electron Transistor Circuits Based on E_b/N_0-Bit Error Rate Characteristics
Low-Temperature Metal-Oxide-Semiconductor Field-Effect Transistor Operation by Temperature Scaling Theory
An Inductorless Phase-Locked Loop with Pulse Injection Locking Technique in 90 nm CMOS (集積回路)

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