Reliability of Single Electron Transistor Circuits Based on E_b/N_0-Bit Error Rate Characteristics
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概要
- 論文の詳細を見る
Bit error rate (BER) characteristics of single electron transistor (SET) circuits have been evaluated using the Monte Carlo simulation. It has been confirmed from the simulation results that the reliability of the complementary-SET (CSET) inverter is dominated by the universal E_b/N_0-BER characteristics, where E_b is the bit energy, N_0 the noise power per unit frequency, and BER the bit error rate. In this paper it is determined from the E_b/N_0-BER characteristics of the CSET circuit, that the CSET system based on the conventional circuit building method cannot be implemented for room temperature operations.
- 社団法人応用物理学会の論文
- 1999-01-30
著者
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Masu K
Research Institute Of Electrical Communication Tohoku University
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Masu Kazuya
Integrated Research Institute
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Masu Kazuya
Research Institute Of Electrical Communication Tohoku University
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TSUBOUCHI Kazuo
Research Institute of Electrical Communication, Tohoku University
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Masu Kazuya
東工大
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Tsubouchi K
Tohoku Univ. Sendai Jpn
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Shimano S
Department Of Upland Farming National Agricultural Research Center For Tohoku Region
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Shimano Satoshi
Research Institute Of Electrical Communication Tohoku University
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Tsubouchi Kazuo
Research Institute Of Electrical Communicaiton Tohoku University
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TSUBOUCHI Kazuo
Research Institute of Electric Communication (RIEC), Tohoku University
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