KUMASHIRO Shigetaka | MIRAI-Selete
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概要
関連著者
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KUMASHIRO Shigetaka
MIRAI-Selete
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Nagata Makoto
Graduate School Of System Informatics Kobe University
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Yamada Toshio
Mirai-selete
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BANDO Yoji
Graduate School of System Informatics, Kobe University
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OHKAWA Toru
MIRAI-Selete
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TAKARAMOTO Toshiharu
MIRAI-Selete
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Bando Yoji
Graduate School Of System Informatics Kobe University
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Nagata Makoto
Kobe Univ. Kobe‐shi Jpn
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MOGAMI Tohru
MIRAI-Selete
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Souda Masaaki
Mirai-selete
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TAKAYA Satoshi
Graduate School of System Informatics, Kobe University
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Takaya Satoshi
Graduate School Of System Informatics Kobe University
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Mogami Tohru
MIRAI--Selete, Tsukuba, Ibaraki 305-8569, Japan
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Mogami Tohru
Graduate School Of System Informatics Kobe University
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Masu K
Research Institute Of Electrical Communication Tohoku University
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Masu Kazuya
Integrated Research Institute
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Masu Kazuya
Tokyo Institute Of Technology
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Amakawa Shuhei
Tokyo Inst. Of Technol. Yokohama‐shi Jpn
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Amakawa Shuhei
Integrated Research Institute Tokyo Institute Of Technology
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YAMADA Kenta
NEC Electronics Corporation
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SATO Takashi
Tokyo Institute of Technology
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NAKAYAMA Noriaki
Tokyo Institute of Technology
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Tanoi Satoru
東工大
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Masu Kazuya
東工大
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Yamada Kenta
Nec Electronics Corp. Kawasaki‐shi Jpn
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Masu Kazuya
Tokyo Inst. Of Technol. Yokohama‐shi Jpn
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SATO Takashi
Graduate School of Informatics, Kyoto University
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NAKAYAMA Noriaki
Institute for Chemical Research,Kyoto University
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Nakayama Noriaki
Semiconductor Technology Academic Research Center
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Sato Takashi
Graduate School Of Informatics Kyoto University
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Yoshimura Hisao
Mirai-selete
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Yamada Kenta
Mirai-selete
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SYO Toshiyuki
MIRAI-Selete
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ITO Masaru
MIRAI-Selete
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KUNIKIYO Tatsuya
MIRAI-Selete
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KANAMOTO Toshiki
MIRAI-Selete
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Masu Kazuya
Solutions Research Laboratory Tokyo Institute Of Technology
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MOGAMI Tohru
Graduate School of System Informatics, Kobe University
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SODA Masaaki
Dept. of Computer Science and System Engineering, Kobe University
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BANDO Yoji
Dept. of Computer Science and System Engineering, Kobe University
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TAKAYA Satoshi
Dept. of Computer Science and System Engineering, Kobe University
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NAGATA Makoto
Dept. of Computer Science and System Engineering, Kobe University
著作論文
- Layout-Aware Compact Model of MOSFET Characteristics Variations Induced by STI Stress
- Exhaustive and Systematic Accuracy Verification and Enhancement of STI Stress Compact Model for General Realistic Layout Patterns
- A Continuous-Time Waveform Monitoring Technique for On-Chip Power Noise Measurements in VLSI Circuits
- On-Chip Single Tone Pseudo-Noise Generator for Analog IP Noise Tolerance Measurement
- On-Chip In-Place Measurements of V_ and Signal/Substrate Response of Differential Pair Transistors
- Measurements and Simulation of Sensitivity of Differential-Pair Transistors against Substrate Voltage Variation