Minimization of BF^+_2-Implantation Dose to Reduce the Annealing Time for Ultra-Shallow Source/Drain Junction Formation below 600℃

スポンサーリンク

概要

• 論文の詳細を見る
• 社団法人応用物理学会の論文
• 1998-03-30

著者

• Nakada A

  Vlsi Design And Education Center The University Of Tokyo

• Ohmi Tadahiro

  Department Of Electronic Engineering Graduate School Of Engineering Tohoku University

• KANEMOTO Kei

  Department of Electronic Engineering, Graduate School of Engineering, Tohoku University

• NAKADA Akira

  Department of Electronic Engineering, Graduate School of Engineering, Tohoku University

• Ohmi Tadahiro

  Department Of Electronic Engineering

• Kanemoto Kei

  Department Of Electronic Engineering Graduate School Of Engineering Tohoku University

関連論文

• Fully-Parallel VLSI Implementation of Vector Quantization Processor Using Neuron-MOS Technology (Special Issue on Integrated Electronics and New System Paradigms)
• Minimization of BF^+_2-Implantation Dose to Reduce the Annealing Time for Ultra-Shallow Source/Drain Junction Formation below 600℃
• Reduction of BF2+-Implantation Dose to Minimize the Annealing Time for Ultra-Shallow Source/Drain Junction Formation below 600℃
• A Comparative Examination of Ion Implanted n^+p Junctions Annealed at 1000℃ and 450℃
• Formation of Ultra-Shallow and Low-Leakage p^+n Junctions by Low-Temperature Post-Implantation Annealing
• Effect of Substrate Boron Concentration on the Integrity of 450℃-Annealed Ion-Implanted Junctions
• Reducing Reverse-Bias Current in 450℃-Annealed n^+p Junction by Hydrogern Radical Sintering
• Neuron MOS Analog/Digital Merged Circuit Technology For Center-Of-Mass Tracker Circuit
• Ultra-Low-Temperature Formation of Si Nitride Film by Direct Nitridation Employing High-Density and Low-Energy Ion Bombardment
• Functional demonstration of the ability of a primary spermatogonium as a stem cell by tracing a single cell destiny in Xenopus laevis
• Silicon Wafer Orientation Dependence of Metal Oxide Sermiconductor Device Reliability
• Ultra Low-Temperature Growth of High-Integrity Thin Gate Oxide Films by Low-Energy Ion-Assisted Oxidation
• Preoxide-Controlled Oxidation for Very Thin Oxide Films
• Native Oxide Growth on Silicon Surface in Ultrapure Water and Hydrogen Peroxide
• Dopant-Free Channel Transistor with Punchthrough Control Region under Source and Drain
• Formation of Ultra-Shallow and Low-Reverse-Bias-Current Tantalum-Silicided Junctions Using a Si-Eneapsulated Silicidation Technique and Low-Temperature Furnace Annealing below 550℃
• Formation of Ultra-Shallow, Low-Leakage and Low-Contact-Resistance Junctions by Low-Temperature Si-Encapsulated Silicidation Process
• Design of Radial Line Slot Antennas at 8.3 GHz for Large Area Uniform Plasma Generation
• Abrupt and Arbitrary Profile Formation in Silicon Using a Low-Kinetic-Energy Ion Bombardment Process
• Impact of High-Precision RF-Plasma Control on Very-Low-Temperature Silicon Epitaxy
• Improvement of Rinsing Efficiency after Sulfuric Acid Hydrogen Peroxide Mixture (H_2SO_4/H_2O_2) by HF Addition
• Characterization and Control of Native Oxide on Silicon
• Low Power Neuron-MOS Technology for High-Functionality Logic Gate Synthesis (Special Issue on New Concept Device and Novel Architecture LSIs)
• A Model for the Electrochemical Deposition and Removal of Metallic Impurities on Si Surfaces (Special Issue on Scientific ULSI Manufacturing Technology)
• Ultrashallow and Low-Leakage p^+n Junction Formation by Plasma Immersion Ion Implantation (PIII) and Low-Temperature Post-Implantation Annealing
• Flexible Processor Based on Full-Adder/D-Flip-Flop Merged Module (FDMM)
• Ultra-Shallow and Low-Leakage p^+n Junctions Formation by Plasma Immersion Ion Implantation (PIII) and Low-Temperature Post-Implantation Annealing
• Enhancement of Silicon Epitaxy by Increased Phosphorus Concentration in a Low-Energy Ion Bombardment Process
• Minimizing Wafer Surface Damage and Chamber Material Contamination in New Plasma Processing Equipment
• Planar-Type Gunn Diode of InP
• Development of Scanning μ-RHEED Microscopy for Imaging Polycrystal Grain Structure in LSI (SOLID STATE DEVICES AND MATERIALS 1)
• Very-Low-Temperature Epitaxial Silicon Growth By Low-Kinetic-Energy Particle Bombardment : Silicon Devices and Process Technologies(Solid State Devices and Materials 1)
• Hot-Carrier-Immunity Degradation in Metal Oxide Semiconductor Field Effect Transistors Caused by Ion-Bombardment Processes
• Effect of Preoxide on the Structure of Thernmal Oxide
• Native Oxide Growing Behavior on Si Crystal Structure and Resistivity
• The Nature of Metallic Contamination on Various Silicon Substrates
• In Situ Observation of Electromigration in Cu Film Using Scanning μ-Reflection High-Energy Electron Diffraction Microscope
• In Situ Chamber Cleaning Using Halogenated-Gas Plasmas Evaluated by Plasma-Parameter Extraction
• Modeling and Analysis of RF Plasma Using Electrical Equivalent Circuit
• Effect of Silicon Wafer In Situ Cleaning on the Chemical Structure of Ultrathin Silicon Oxide Film
• Formation Process of Highly Reliable Ultra-Thin Gate Oxide
• Dielectric Relaxation Effect of Traveling Carriers in the Semiconductors
• Gas Chemistry Dependence of Si Surface Reactions in a Fluorocarbon Plasma during Contact Hole Etching
• Dependence of Gas Chemistry on Si Surface Reactions in High C/F Ratio Fluorocarbon Plasma during Contact Hole Etching
• Trends for Future Silicon Technology
• Time-Dependent Dielectric Degradation (TDDD) Influenced by Ultrathin Oxidation Process
• Neuron-MOS Parallel Search Hardware for Real-Time Signal Processing
• High-Reliability Lithography Performed by Ultrasonic and Surfactant-Added Developing System
• High-Sensitivity and High-Resolution Contact Hole Patterning by Enhanced-Wettability Developer
• Metallic Impurity Growing Behavior on Surface Crystal Structure
• Study on an Angular Momentum Conservation of Radiation in a Uniaxial Crystal
• Static Negative Resistance in Highly Doped Gunn Diodes and Application to Switching and Amplification
• Superior Generalization Capability of Hardware-Learing Algorithm Developed for Self-Learning Neuron-MOS Neural Networks
• Dopant-Induced Defects Formed by Ion Implantation : Dopant Species Dependence
• Functionality Enhancement in Elemental Devices for Implementing Intelligence on Integrated Circuits (Special Issue on New Concept Device and Novel Architecture LSIs)
• Specialty Gas Interactions with Various Silicon Surfaces
• Selective Tungsten Chemical Vapor Deposition with High Deposition Rate for ULSI Application
• Four-Terminal Device Electronics for Intelligent Silicon Integrated Systems
• Strategy in Cleaning Processes for Future Materials
• Contamination-Free Physical Resist Stripping by Megasonic/IPA/Fluoride Enhanced Life-off Processing
• Enhancement of Silicon Epitaxy by Increased Phosphorus Concentration in a Low-Energy Ion Bombardment Process
• Formation of Ultra-Shallow and Low-Reverse-Bias-Current Tantalum-Silicided Junctions Using a Si-Encapsulated Silicidation Technique and Low-Temperature Furnace Annealing below 550°C
• Improvement of Rinsing Efficiency after Sulfuric Acid Hydrogen Peroxide Mixture ( H2SO4/H2O2) by HF Addition
• Time-Dependent Dielectric Degradation (TDDD) Influenced by Ultrathin Film Oxidation Process

もっと見る 閉じる

スポンサーリンク