New Reconfigurable Memory Architecture for Parallel Image Processing LSI with Three-Dimensional Structure

スポンサーリンク

概要

• 論文の詳細を見る
• 2007-09-19

著者

• 小柳 光正

  東北大院工

• KOYANAGI Mitsumasa

  Department of Machine Intelligence and Systems Engineering, Tohoku University

• SUGIMURA Takeaki

  Department of Bioengineering and Robotics, Tohoku University

• FUKUSHIMA Takafumi

  Department of Bioengineering and Robotics, Tohoku University

• Sugimura Takeaki

  Department Of Bioengineering And Robotics Graduate School Of Engineering Tohoku University

• Koyanagi Mitsumasa

  Cir Tohoku University

• Fukushima Takafumi

  Dept. Of Bioengineering And Robotics Graduate School Of Engineering Tohoku University

• Fukushima Takafumi

  Department Of Advanced Materials Chemistry Graduate School Of Engineering Yokohama National Universi

• Tanaka Tetsu

  Dept. Of Bioengineering And Robotics Graduate School Of Engineering Tohoku University

• Tanaka Tetsu

  Department Of Quantum Materials Science University Of Tokushima

• KODAMA Shigeo

  Department of Bioengineering and Robotics, Graduate School of Engineering, Tohoku University

• AMANO Daijiro

  Department of Bioengineering and Robotics, Graduate School of Engineering, Tohoku University

• Amano Daijiro

  Department Of Bioengineering And Robotics Graduate School Of Engineering Tohoku University

• Kodama Shigeo

  Department Of Bioengineering And Robotics Graduate School Of Engineering Tohoku University

• Koyanagi Mitsumasa

  Department Of Bioengineering And Robotics Graduate School Of Engineering Tohoku University

• Tanaka Tetsu

  Graduate School Of Biomedical Engineering Tohoku University

• Kamiyanagi Masashi

  Center For Interdisciplinary Research Tohoku University

• Fukushima Takafumi

  Department Of Bioengineering And Robotics Tohoku University

• Tanaka Tetsu

  Department of Bioengineering and Robotics, Graduate School of Engineering, Tohoku University, 6-6-01 Aza-Aoba, Aramaki, Aoba-ku, Sendai 980-8579, Japan

関連論文

• 金属ナノドットを有する不揮発性メモリの基本特性(ゲート絶縁膜形成およびメモリ技術,ゲート絶縁膜,容量膜,機能膜及びメモリ技術)
• Development of Three-Dimensional Integration Technology for Highly Parallel Image-Processing Chip
• A New Wafer Scale Chip-on-Chip (W-COC) Packaging Technology Using Adhesive Injection Method
• New Three-Dimensional Wafer Bonding Technology Using the Adhesive Injection Method
• 三次元積層型集積回路のための自己組織化チップ位置合せ技術(先端電子デバイスパッケージと高密度実装における評価・解析技術論文)
• 4.極限集積化を目指すスーパチップ(エレクトロニクスの多様化を支える新デバイス技術-2020年を見据えて-)
• Verification of Stable Circuit Operation of 180nm Current Controlled MOS Current Mode Logic under Threshold Voltage Fluctuation(Session 7B : Si IC and Circuit Technology)
• The Impact of Current Controlled-MOS Current Mode Logic/Magnetic Tunnel Junction Hybrid Circuit for Stable and High-speed Operation(Session 7B : Si IC and Circuit Technology)
• 三次元積層型チップのためのSi貫通ビア(TSV)形成技術(三次元実装材料)
• 自己組織化ウェーハ張り合わせによる三次元集積化技術(配線・実装技術と関連材料技術)
• 受光素子と刺激電流生成回路を有する完全埋込型人工網膜チップ (情報センシング コンシューマエレクトロニクス)
• 3次元実装技術とスーパーチップインテグレーション(LSIシステムの実装・モジュール化・インタフェース技術,テスト技術,一般)
• 3次元実装技術とスーパーチップインテグレーション(LSIシステムの実装・モジュール化・インタフェース技術,テスト技術,一般)
• 3次元実装技術とスーパーチップインテグレーション
• VCSELのインターコネクションへの応用 (特集 VCSELの最先端技術と応用,そして将来展望)
• 三次元集積回路を用いた並列画像処理システムのためのばらつき補正回路を有する並列AD変換器の設計(システムLSIの応用と要素技術,専用プロセッサ,プロセッサ,DSP,画像処理技術,及び一般)
• 三次元集積回路技術を用いた並列画像処理のための再構成可能な積層型メモリシステムの設計(システムLSIの応用と要素技術,専用プロセッサ,プロセッサ,DSP,画像処理技術,及び一般)
• 三次元集積回路を用いた並列画像処理システムのためのばらつき補正回路を有する並列AD変換器の設計(システムLSIの応用と要素技術,専用プロセッサ,プロセッサ,DSP,画像処理技術,及び一般)
• New Magnetic Nano-Dot Memory with FePt Nano-Dots
• Fabrication and Evaluation of Magnetic Tunnel Junction with MgO Tunneling Barrier
• 三次元光・電子融合集積化技術(IEDM特集(先端CMOSデバイス・プロセス技術))
• 三次元集積化技術の課題と展望(配線・実装技術と関連材料技術)
• セルフアセンブリを基盤としたウェーハレベル三次元集積化技術(IEDM特集(先端CMOSデバイス・プロセス技術))
• SSDM2003国際会議報告
• New Magnetic Flash Memory with FePt Magnetic Floating Gate
• New Silicon-on-Insulator (SOI) Flash Memory with Side Channel and Side Floating Gate
• Characteristics of Metal Gate GOI-MOSFET with High-k Gate Dielectric Fabricated by Ge Condensation Method
• 417 3 次元積層型人工眼チップの研究
• Proposal of New Nonvolatile Memory with Magnetic Nano-Dots
• Polyimide Optical Waveguide with Multi-Fan-Out for Multi-Chip Module Application
• Study of the DC Performance of Fabricated Magnetic Tunnel Junction Integrated on Back-End Metal Line of CMOS Circuits
• Transient Characteristic of Fabricated Magnetic Tunnel Junction (MTJ) Programmed with CMOS Circuit
• 3P275 ハエトリグモロドプシンの吸収スペクトル特性と奥行き知覚メカニズムとの関係の解析(光生物-視覚・光受容,第48回日本生物物理学会年会)
• Fabrication of Hollow Cylinder Shape Permalloy on the Si Pole
• Ultrashallow Junction Formation by Rapid Thermal Annealing of Arsenic-Adsorbed Layer
• New Reconfigurable Memory Architecture for Parallel Image Processing LSI with Three-Dimensional Structure
• Development of Power Supply System for Three-Dimensionally Staked Retinal Prosthesis Chip
• Tungsten Through-Si Via (TSV) Technology for Three-Dimensional LSIs
• Memory Window Enhancement of MOS Memory Devices with High Density Self-Assembled Tungsten Nano-dot
• Low power spin-transfer magnetoresistive random access memory writing scheme with selective word line bootstrap (Special issue: Solid state devices and materials)
• Development of Si Long Microprobe (SiLM) for Platform of Intelligent Neural Implant Microsystem
• Evaluation of Electrical Stimulus Current to Retina Cells for Retinal Prosthesis by Using Platinum-Black (Pt-b) Stimulus Electrode Array
• Low Power Spin-Transfer MRAM Writing Scheme with Selective Word Line Bootstrap
• Sub-Atmospheric Chemical Vapor Deposition Process for Chip-to-Wafer 3-Dimensional Integration
• New Three-Dimensional Integration Technology Using Chip-to-Water Bonding to Achieve Ultimate Super-Chip Integration (Special Issue: Solid State Devices & Materials)
• Effects of Ion Implantation Damage on Elevated Source/Drain Formation for Ultrathin Body Silicon on Insulator Metal Oxide Semiconductor Field-Effect Transistor (Special Issue: Solid State Devices & Materials)
• Low Power and High Sensitivity MRAM Sensing Scheme with Body Biased Preamplifier
• Estimation of Wire Length Distribution for Evaluating Performance Improvement of Three-Dimensional LSI
• Evaluation of Electrical Stimulus Current to Retina Cells for Retinal Prosthesis
• Intelligent Neural Implant Microsystem Fabricated Using Multi-Chip Bonding Technique
• Ultimate Functional Multi-Electrode System (UFMES) Based on Multi-Chip Bonding Technique
• Three-Dimensionally Stacked Analog Retinal Prosthesis Chip
• QUANTITATIVE PCR-BASED SCREENING OF THE CO_2 SENSOR PROTEIN OF THE MOSQUITO (ANOPHELES STEPHENSI)(Physiology,Abstracts of papers presented at the 76^ Annual Meeting of the Zoological Society of Japan)
• CO_2 SENSOR PROTEIN IN THE MOSQUITO (ANOPHELES STEPHENSI)(Physiology,Abstracts of papers presented at the 75^ Annual Meeting of the Zoological Society of Japan)
• IDENTIFICATION AND CHARACTERIZATION OF ENCEPHALOPSIN HOMOLOGUES OF THE MOSQUITO AND THE HONEYBEE(Physiology,Abstracts of papers presented at the 76^ Annual Meeting of the Zoological Society of Japan)
• Retinal Prosthesis System with Telemetry Circuit Controlled by Human Eyelid Movement
• Novel Silicon On Insulator Metal Oxide Semiconductor Field Effect Transistors with Buried Back Gate
• Vision Chip with Electrical Fovea Motion
• Design and Evaluation of a High Speed Routing Lookup Architecture(Implementation and Operation)(Internet Technology IV)
• Fundamental Properties of Organic Low-k Dielectrics Usable in the Cu Damascene Process
• Deep Trench Etching for Chip-to-Chip Three-Dimensional Integration
• New Three-Dimensional Integration Technology Using Chip-to-Wafer Bonding to Achieve Ultimate Super Chip Integration
• THE NEURAL NETWORK RELATED WITH THE CHROMATIC TYPE RESPONSE OF THE LAMPREY PINEAL(Physiology,Abstracts of papers presented at the 75^ Annual Meeting of the Zoological Society of Japan)
• CHARACTERIZATION OF UV SENSITIVE OPSIN IN THE PINEAL ORGAN OF THE LAMPREY(Physiology,Abstracts of papers presented at the 74^ Annual Meeting of the Zoological Society of Japan)
• UV-SENSITIVE PHOTORECEPTORS IN THE PINEAL ORGAN OF THE RIVER LAMPREY, LAMPETRA JAPONICA(Physiology,Abstracts of papers presented at the 74^ Annual Meeting of the Zoological Society of Japan)
• VISUAL PIGMENTS IN TWO PATHWAYS OF PHOTO-SIGNALS IN THE LAMPREY PINEAL ORGAN(Physiology,Abstracts of papers presented at the 74^ Annual Meeting of the Zoological Society of Japan)
• IDENTIFICATION AND CHARACTERIZATION OF VISUAL PIGMENTS OF THE JUMPING SPIDER(Physiology,Abstracts of papers presented at the 76^ Annual Meeting of the Zoological Society of Japan)
• Two-Dimensional Analytical Subthreshold Model and Optimal Scaling of Fully-Depleted SOI MOSFET Down to 0.1 μm Channel Length
• Nickel Germanide Formation on Condensed Ge Layer for Ge-on-Insulator Device Application
• Electrical Characterization of Metal–Oxide–Semiconductor Memory Devices with High-Density Self-Assembled Tungsten Nanodots
• Characteristics of Copper Spiral Inductors Utilizing FePt Nanodot Films
• Cannula-aided penetration : A simple method to insert structurally weak electrodes into brain through the dura mater
• Ultrafast Active Transmission Lines with Low-k Polyimide Integrated with Ultrafast Photoconductive Switches
• Power Supply System Using Electromagnetic Induction for Three-Dimensionally Stacked Retinal Prosthesis Chip
• Evaluation of Platinum-Black Stimulus Electrode Array for Electrical Stimulation of Retinal Cells in Retinal Prosthesis System
• Evaluation of Electrical Stimulus Current Applied to Retina Cells for Retinal Prosthesis
• Optical Interposer Technology using Buried Vertical-Cavity Surface-Emitting Laser Chip and Tapered Through-Silicon Via for High-Speed Chip-to-Chip Optical Interconnection
• The Impact of Current Controlled-MOS Current Mode Logic/Magnetic Tunnel Junction Hybrid Circuit for Stable and High-Speed Operation
• Verification of Stable Circuit Operation of 180nm Current Controlled MOS Current Mode Logic under Threshold Voltage Fluctuation
• Development of Si Double-Sided Microelectrode for Platform of Brain Signal Processing System
• Development of Si Neural Probe with Microfluidic Channel Fabricated Using Wafer Direct Bonding
• Characteristics of Silicon-on-Low $k$ Insulator Metal Oxide Semiconductor Field Effect Transistor with Metal Back Gate
• New Reconfigurable Memory Architecture for Parallel Image-Processing LSI with Three-Dimensional Structure
• Nickel Germanide Formation on Condensed Ge Layer for Ge-on-Insulator Device Application
• Fundamental Study of Complementary Metal Oxide Semiconductor Image Sensor for Three-Dimensional Image Processing System
• Tungsten Through-Silicon Via Technology for Three-Dimensional LSIs
• Effects of Ion Implantation Damage on Elevated Source/Drain Formation for Ultrathin Body Silicon on Insulator Metal Oxide Semiconductor Field-Effect Transistor
• Fabrication and Evaluation of Magnetic Tunnel Junction with MgO Tunneling Barrier
• New Three-Dimensional Integration Technology Using Chip-to-Wafer Bonding to Achieve Ultimate Super-Chip Integration
• Quantitative Derivation and Evaluation of Wire Length Distribution in Three-Dimensional Integrated Circuits Using Simulated Quenching
• Low Power Spin-Transfer Magnetoresistive Random Access Memory Writing Scheme with Selective Word Line Bootstrap
• Novel Optical/Electrical Printed Circuit Board with Polynorbornene Optical Waveguide
• Low-Power and High-Sensitivity Magnetoresistive Random Access Memory Sensing Scheme with Body-Biased Preamplifier
• New Magnetic Flash Memory with FePt Magnetic Floating Gate
• New Magnetic Nanodot Memory with FePt Nanodots
• Three-Dimensionally Stacked Analog Retinal Prosthesis Chip
• Low-Loss Optical Interposer with Recessed Vertical-Cavity Surface-Emitting Laser Diode and Photodiode Chips into Si Substrate
• Deep-Trench Etching for Chip-to-Chip Three-Dimensional Integration Technology
• Multichip Shared Memory Module with Optical Interconnection for Parallel-Processor System
• Ultrafast Active Transmission Lines with Low-$k$ Polyimide Integrated with Ultrafast Photoconductive Switches

もっと見る 閉じる

スポンサーリンク