High Open-Circuit Voltage Gain in Vertical InGaAs Channel Metal--Insulator--Semiconductor Field-Effect Transistor Using Heavily Doped Drain Region and Narrow Channel Mesa
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概要
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We fabricated a vertical metal--insulator--semiconductor field-effect transistor (MISFET) with a heterostructure launcher and an undoped channel. Vertical MISFETs exhibit a high drain current density; however, their large output conductance is a disadvantage for the open-circuit voltage gain. In a previous study, a maximum voltage gain of 4.0 was found in a vertical MISFET with a heavily doped drain region and a 45-nm-wide channel mesa. The heavily doped drain region and a narrower channel width are effective in reducing the output conductance. In this study, we fabricated a device with the heavily doped drain region and a 23-nm-wide channel mesa structure. It was observed that the output conductance decreased from 120 to 57 mS/mm at a drain current density of 0.3 MA/cm<sup>2</sup>with a narrower channel mesa. The maximum open-circuit voltage gain increased from 4.0 to 5.7.
- 2013-04-25
著者
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Ikeda Shunsuke
Department Of Physical Electronics Tokyo Institute Of Technology
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Miyamoto Yasuyuki
Department Of Electrical And Electronic Engineering
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Hirai Jun
Department Of Applied Physics Graduate School Of Engineering Osaka City University
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Hirai Jun
Department of Physical Electronics, Tokyo Institute of Technology, Meguro, Tokyo 152-8552, Japan
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Kashiwano Masashi
Department of Physical Electronics, Tokyo Institute of Technology, Meguro, Tokyo 152-8552, Japan
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Fujimatsu Motohiko
Department of Physical Electronics, Tokyo Institute of Technology, Meguro, Tokyo 152-8552, Japan
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