A Second-Order Multibit Complex Bandpass ΔΣAD Modulator with I, Q Dynamic Matching and DWA Algorithm(<Special Section>Analog Circuits and Related SoC Integration Technologies)

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概要

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• We have designed, fabricated and measured a second-order multibit switched-capacitor complex bandpass ΔΣAD modulator to evaluate our new algorithms and architecture. We propose a new structure of a complex bandpass filter in the forward path with I, Q dynamic matching, that is equivalent to the conventional one but can be divided into two separate parts. As a result, the ΔΣ modulator, which employs our proposed complex filter can also be divided into two separate parts, and there are no signal lines crossing between the upper and lower paths formed by complex filters and feedback DACs. Therefore, the layout design of the modulator can be simplified. The two sets of signal paths and circuits in the modulator are changed between I and Q while CLK is changed between high and low by adding multiplexers. Symmetric circuits are used for I and Q paths at a certain period of time, and they are switched by multiplexers to those used for Q and I paths at another period of time. In this manner, the effect of mismatches between I and Q paths is reduced. Two nine-level quantizers and four DACs are used in the modulator for low-power implementations and higher signal-to-noise-and-distortion (SNDR), but the nonlinearities of DACs are not noise-shaped and the SNDR of the ΔΣAD modulator degrades. We have also employed a new complex bandpass data-weighted averaging (DWA) algorithm to suppress nonlinearity effects of multibit DACs in complex form to achieve high accuracy; it can be realized by just adding simple digital circuitry. To evaluate these algorithms and architecture, we have implemented a modulator using 0.18μm CMOS technology for operation at 2.8V power supply; it achieves a measured peak SNDR of 64.5dB at 20MS/s with a signal bandwidth of 78kHz while dissipating 28.4mW and occupying a chip area of 1.82mm^2. These experimental results demonstrate the effectiveness of the above two algorithms, and the algorithms may be extended to other complex bandpass ΔΣAD modulators for application to low-IF receivers in wireless communication systems.

• 2007-06-01

著者

• HAYAKAWA Akira

  Department of Physics, Tokyo Metropolitan University

• SAN Hao

  Department of Information Network Engineering, Tokyo City University

• KOBAYASHI Haruo

  Department of Electronic Engineering, Graduate School of Engineering, Gunma University

• San Hao

  Dep. Of Information Network Engineering Tokyo City Univ.

• San Hao

  Department Of Electronic Engineering Faculty Of Engineering Gunma University

• Hotta Masao

  Department Of Electronics & Communication Engineering Musashi Institute Of Technology

• Wada Atsushi

  Devices Development Center Mixed Signal Department Sanyo Electric Co. Ltd.

• Nakane Hideo

  Advanced Analog Development Dept. Renesas Technology Corp.

• Hayakawa Akira

  Department Of Electronic Engineering Faculty Of Engineering Gunma University

• TSUKADA Toshiro

  Semiconductor Technology Academic Research Center

• Kobayashi Haruo

  Department Of Electronic Engineering Faculty Of Engineering Gunma University

• Kobayashi Haruo

  Electronic Engineering Department Graduate School Of Engineering Gunma University

• HAGIWARA Hiroyuki

  Department of Neurosurgery, Yokohama Stroke and Brain Center

• Mashiko Koichiro

  Semiconductor Technology Academic Research Center (starc)

• Kudoh Junya

  Advanced Analog Development Dept. Renesas Technology Corp.

• Wada Hiroki

  Department Of Electronic Engineering Faculty Of Engineering Gunma University

• San Hao

  Tokyo City Univ. Tokyo Jpn

• JINGU Yoshitaka

  Department of Electronic Engineering, Faculty of Engineering, Gunma University

• MATSUURA Tatsuji

  Advanced Analog Development Dept., Renesas Technology Corp.

• YAHAGI Kouichi

  Advanced Analog Development Dept., Renesas Technology Corp.

• Jingu Yoshitaka

  Department Of Electronic Engineering Faculty Of Engineering Gunma University

• Hagiwara Hiroyuki

  Department Of Electronic Engineering Faculty Of Engineering Gunma University

• Yahagi Kouichi

  Semiconductor Technology Academic Research Center (starc)

• Wada Hiroki

  Department Of Anesthesiology National Defense Medical College

• Matsuura Tatsuji

  Semiconductor Technology Academic Research Center (starc)

• Kobayashi Haruo

  Gunma University

• Kobayashi Haruo

  Department Of Electronic Engineering Graduate School Of Engineering Gunma University

• Tsukada Toshiro

  Semiconductor Technol. Academic Res. Center Yokohama‐shi Jpn

• Tsukada Toshiro

  Semiconductor & Integrated Circuits Group Hitachi Lid.

• KOBAYASHI HARUO

  Department of Animal Breeding, Faculty of Agriculture, University of Tokyo

• Hagiwara Hiroyuki

  Department of Electrical and Electronic Engineering, College of Engineering, Nihon University, Koriyama, Fukushima 963-8642, Japan

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