Algorithms for Digital Correction of ADC Nonlinearity
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概要
- 論文の詳細を見る
This paper describes two digital correction algorithms for ADC nonlincarity, targeted for mixed-signal LSI tester applications : an interpolation algorithm and a stochastic algorithm. Numerical simulations show that our algorithms compensate for ADC nonlinearity as well as missing codes and nonmonotonicity characteristics, and improve ADC SNDR and SFDR.
- 社団法人電子情報通信学会の論文
- 2003-02-01
著者
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Yagi Hiroshi
Department of Cardiology, Nihon University Surugadai Hospital
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KOBAYASHI Haruo
Department of Electronic Engineering, Graduate School of Engineering, Gunma University
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Yagi Hiroshi
Department Of Cardiology Nihon University Surugadai Hospital
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Kobayashi Haruo
Department Of Electronic Engineering Faculty Of Engineering Gunma University
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Kobayashi Haruo
Electronic Engineering Department Graduate School Of Engineering Gunma University
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Kobayashi Haruo
The Department Of Electronic Engineering Faculty Of Engineering Gunma University
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Kobayashi Haruo
Sanyo Lsi Design-system Soft Co. Ltd.
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Kobayashi H
The Department Of Electronic Engineering Faculty Of Engineering Gunma University
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KOMURO Takanori
Agilent Technologies International Japan, Ltd.
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SAKAYORI Hiroshi
Agilent Technologies International Japan, Ltd.
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Komuro T
Agilent Technologies International Japan Ltd.
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Komuro Takanori
Department Of Electronic Engineering Faculty Of Engineering Gunma University
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Sakayori Hiroshi
Agilent Technologies International Japan Ltd.
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Komuro Takanori
Agilent Technologies International Japan Ltd.
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Yagi H
Department Of Electronic Engineering Faculty Of Engineering Gunma University
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Yagi Hiroshi
Department Of Biological Chemistry Yamaguchi University
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KOBAYASHI HARUO
Department of Animal Breeding, Faculty of Agriculture, University of Tokyo
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