Track/Hold Circuit in GaAs HBT Process (Special Section of Selected Papers from the 9th Karuizawa Workshop on Circuits and Systems)

概要

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This paper reports on the design and performance of a very fast Track/Hold (T/H) circuit with GaAs Heterojunction Bipolar Transistor (HBT) to precede a 3 GS/s 6 bit ADC. The T/H circuit employs a differential open-loop architecture for high-speed operation, and it consists of diode bridge switches, hold capacitors and output buffers. The differential structure as well as the output buffers suppress droop effects due to the small h_<FE>(≈20) of our HBT. Measured results show that the T/H circuit has better than 6 bit linearity within an input range of 1.0 V_<p_p> with power dissipation of 990 mW, and the bandwidth is 6 GHz in the track mode. The measured droop rate is 2.1 mV/ns, the feedthrough is -46 dB at 500 MHz and the hold pedestal is less than 10 mV. Also a 3 GHz sampling operation of the T/H circuit was measured. The T/H circuit uses 43 HBTs, 24 Schottky barrier diodes and occupies a chip area of 1.4x1.75 mm^2. We also describe the design and performance of a variable gain amplifier with GaAs HBT to precede the T/H circuit as an input buffer and adjust its gain. These results support the possibility of meeting the requirements for a high-speed ADC system.
社団法人電子情報通信学会の論文
1997-03-25