Novel Architecture of Feedforward Second-Order Multibit ΔΣAD Modulator
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概要
- 論文の詳細を見る
This paper proposes novel feedforward architecture of the second-order multibit ΔΣAD modulator with single DAC-feedback topology. The ΔΣAD modulator realizes high resolution by oversampling and noise shaping techniques. However, its SNDR (Signal to Noise and Distortion Ratio) is limited by the dynamic range of the input signal and non-idealities of circuit building blocks, particularly by the harmonic distortion in amplifier circuits. A full feedforward ΔΣAD modulator structure has the signal transfer function of unity under ideal circumstances, which means that the signal swings through the loop filter become smaller compared with a feedbacked ΔΣAD modulator. Therefore, the harmonic distortion generated inside the loop filter can be significantly reduced in the feedforward structure because the effect of non-idealities in amplifiers can be suppressed when signal swing is small. Moreover, the reduction of the internal signal swings also relaxes output swing requirements for amplifiers with low supply voltage. However, in conventional feedforward ΔΣAD modulator, an analog adder is needed before quantizer, and especially in a multibit modulator, an additional amplifier is necessary to realize the summation of feedforward signals, which leads to extra chip area and power dissipation. In this paper, we propose a novel architecture of a feedforward ΔΣAD modulator which realizes the summation of feedforward signals without additional amplifier. The proposed architecture is functionally equivalent to the conventional one but with smaller chip area and lower power dissipation. We conducted MATLAB and SPICE simulations to validate the proposed architecture and modulator circuits.
- （社）電子情報通信学会の論文
- 2008-04-01
著者
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YOSHIDA Hiroshi
Toshiba Corp.
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Xu Feng
Department of Pharmacy, Zhujiang Hospital, Southern Medical University
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SAN Hao
Department of Information Network Engineering, Tokyo City University
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KONAGAYA Hajime
Department of Electronic Engineering, Graduate School of Engineering, Gunma University
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KOBAYASHI Haruo
Department of Electronic Engineering, Graduate School of Engineering, Gunma University
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ANDO Kazumasa
Toshiba Microelectronics Corporation
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MURAYAMA Chieto
Toshiba Microelectronics Corporation
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San Hao
Dep. Of Information Network Engineering Tokyo City Univ.
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San Hao
Department Of Electronic Engineering Faculty Of Engineering Gunma University
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Konagaya Hajime
Department Of Electronic Engineering Graduate School Of Engineering Gunma University
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Kobayashi Haruo
Department Of Electronic Engineering Faculty Of Engineering Gunma University
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Xu Feng
Department Of Electronic Engineering Graduate School Of Engineering Gunma University
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San Hao
Tokyo City Univ. Tokyo Jpn
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Kobayashi Haruo
Gunma Univ. Kiryu‐shi Jpn
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MOTOZAWA Atsushi
Department of Electronic Engineering, Graduate School of Engineering, Gunma University
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MIYAZAWA Kanichi
Toshiba LSI System Support Co., LTD
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Motozawa Atsushi
Department Of Electronic Engineering Graduate School Of Engineering Gunma University
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Xu Feng
Department Of Applied Chemistry Okayama University Of Science
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Miyazawa Kanichi
Toshiba Lsi System Support Co. Ltd
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Yoshida Hiroshi
Toshiba Lsi System Support Co. Ltd
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KOBAYASHI HARUO
Department of Animal Breeding, Faculty of Agriculture, University of Tokyo
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