SAR ADC Algorithm with Redundancy and Digital Error Correction
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概要
- 論文の詳細を見る
This paper describes an algorithm for Successive Approximation Register (SAR) ADCs with overlapping steps that allow comparison decision errors (due to, such as DAC incomplete settling) to be digitally corrected. We generalize this non-binary search algorithm, and clarify which decision errors it can digitally correct. This algorithm requires more SAR ADC conversion steps than a binary search algorithm, but we show that the sampling speed of an SAR ADC using this algorithm can be faster than that of a conventional binary-search SAR ADC—because the latter must wait for the settling time of the DAC inside the SAR ADC.
- 2010-02-01
著者
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SAN Hao
Department of Information Network Engineering, Tokyo City University
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San Hao
Dep. Of Information Network Engineering Tokyo City Univ.
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San Hao
Department Of Electronic Engineering Faculty Of Engineering Gunma University
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Hotta Masao
Department Of Electronics & Communication Engineering Musashi Institute Of Technology
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KOBAYASHI Haruo
Electronic Engineering Department, Graduate School of Engineering, Gunma University
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Kobayashi Haruo
Electronic Engineering Department Graduate School Of Engineering Gunma University
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Takahashi Yosuke
Electronic Engineering Department Graduate School Of Engineering Gunma University
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Mori Toshihiko
Semiconductor Technology Academic Research Center (starc)
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Ogawa Tomohiko
Electronic Engineering Department Graduate School Of Engineering Gunma University
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San Hao
Tokyo City Univ. Tokyo Jpn
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MATSUURA Tatsuji
Semiconductor and Integrated Circuits Group, Advanced Analog Technology Center, Hitachi, Ltd.
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Takai Nobukazu
Electronic Engineering Department Graduate School Of Engineering Gunma University
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Takai Nobukazu
Department Of Electronic Engineering Graduate School Of Engineering Gunma University
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ABE Akira
Semiconductor Technology Academic Research Center (STARC)
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YAGI Katsuyoshi
Semiconductor Technology Academic Research Center (STARC)
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Yahagi Kouichi
Semiconductor Technology Academic Research Center (starc)
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Matsuura Tatsuji
Semiconductor Technology Academic Research Center (starc)
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Matsuura Tatsuji
Semiconductor & Integrated Circuits Div. Hitachi Ltd.
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Kobayashi Haruo
Gunma University
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Kobayashi Haruo
Department Of Electronic Engineering Graduate School Of Engineering Gunma University
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Takai Nobukazu
Gunma University
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