Approaches to Reducing Digital-Noise Coupling in CMOS Mixed-Signal LSIs (Special Section on Analog Circuit Techniques for System-on-Chip Integration)
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概要
- 論文の詳細を見る
Digital-switching noise coupled into sensitive analog circuits is a critical problem in large-scale integration of mixed analog and digital circuits. This paper describes noise coupling of this kind, especially, through the substrate in CMOS integrated circuits, and reviews recent technical solutions to this noise problem. Simplified models have been developed to simulate the substrate coupling rapidly and accurately. A method using a CMOS comparator was proposed for measuring the effects of substrate noise, and equivalent waveforms of actual substrate noise were obtained. A circuit technique, called active guard band filtering, that controls the noise source is a new approach to substrate noise decoupling. CAD methods for handling substrate-coupled switching noise are making design verification possible for practical mixed-signal LSIs.
- 社団法人電子情報通信学会の論文
- 1997-02-25
著者
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TSUKADA Toshiro
Semiconductor Technology Academic Research Center
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Makie‐fukuda K
Semiconductor Technology Development Center Semiconductor & Integrated Circuits Div. Hitachi Ltd
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FUKUDA Keiko
Semiconductor Technology Development Center, Semiconductor & Integrated Circuits Div., Hitachi, Ltd.
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Fukuda Keiko
Semiconductor Technology Development Center Semiconductor & Integrated Circuits Div. Hitachi Ltd
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Tsukada Toshiro
Semiconductor & Integrated Circuits Group Hitachi Lid.
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Tsukada Toshiro
Semiconductor Technology Development Center Semiconductor & Integrated Circuits Div. Hitachi Ltd
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- High-Speed Continuous-Time Subsampling Bandpass ΔΣAD Modulator Architecture Employing Radio Frequency DAC(Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
- Approaches to Reducing Digital-Noise Coupling in CMOS Mixed-Signal LSIs (Special Section on Analog Circuit Techniques for System-on-Chip Integration)
- Substrate Noise Reduction Using Active Guard Band Filters in Mixed-Signal Integrated Circuits (Special Section on Analog Circuit Techniques for System-on-Chip Integration)
- Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90nm Technology and Beyond (Low Power Techniques, VLSI Design Technology in the Sub-100nm Era)
- A Fast and Accurate Method of Redesigning Analog Subcircuits for Technology Scaling (Special Section on Analog Circuit Techniques and Related Topics)
- Experimental Study on Fully Integrated Active Guard Band Filters for Suppressing Substrate Noise in Sub-Micron CMOS Processes for System-on-a-Chip(Regular Section)